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22a061fb91
The old calculation depended on the sample count, and gave subpar results for 8x MSAA with standard sample locations. The new calculation is based on the Intel pass, with some changing of the constants so that the sample count is always proportional to alpha for 2xMSAA and 4xMSAA and the addition of rotating the sample mask based on the pixel. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39335>
176 lines
6 KiB
C
176 lines
6 KiB
C
/*
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* Copyright 2023 Alyssa Rosenzweig
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* Copyright 2021 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "nir.h"
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#include "nir_builder.h"
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static nir_def *
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alpha_to_coverage(nir_builder *b, nir_def *alpha, bool has_intrinsic)
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{
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if (has_intrinsic)
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return nir_alpha_to_coverage(b, alpha);
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/* The following formula is used to compute final sample mask:
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* m = int(round(16.0 * clamp(src0_alpha, 0.0, 1.0)))
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* dither_mask = 0x1111 * ((0xf7540 >> (m & ~3)) & 0xf) |
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* 0x0404 * (m & 2) | 0x0080 * (m & 1)
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* sample_mask = sample_mask & dither_mask
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*
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* It gives a number of ones proportional to the alpha for 2, 4, 8 or 16
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* least significant bits of the result:
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*
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* 0.0000 0000000000000000
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* 0.0625 0000000010000000
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* 0.1250 0000100000001000
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* 0.1875 0000100010001000
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* 0.2500 0100010001000100
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* 0.3125 0100010011000100
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* 0.3750 0100110001001100
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* 0.4375 0100110011001100
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* 0.5000 0101010101010101
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* 0.5625 0101010111010101
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* 0.6250 0101110101011101
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* 0.6875 0101110111011101
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* 0.7500 0111011101110111
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* 0.8125 0111011111110111
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* 0.8750 0111111101111111
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* 0.9375 0111111111111111
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* 1.0000 1111111111111111
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*
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* We use 16-bit math for the multiplies because the result always fits
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* into 16 bits and that is typically way cheaper than full 32-bit
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* multiplies.
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*/
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nir_def *m =
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nir_f2i32(b, nir_fround_even(b, nir_fmul_imm(b, nir_fsat(b, alpha), 16.0)));
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nir_def *part_a =
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nir_u2u16(b, nir_iand_imm(b, nir_ushr(b, nir_imm_int(b, 0xf7540),
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nir_iand_imm(b, m, ~3)),
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0xf));
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nir_def *part_b = nir_iand_imm(b, nir_u2u16(b, m), 2);
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nir_def *part_c = nir_iand_imm(b, nir_u2u16(b, m), 1);
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nir_def *mask = nir_ior(b, nir_imul_imm(b, part_a, 0x1111),
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nir_ior(b, nir_imul_imm(b, part_b, 0x0404),
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nir_imul_imm(b, part_c, 0x0080)));
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/* Rotate the mask based on (pixel.x % 2) + (pixel.y % 2). This provides
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* dithering and randomizes the sample locations.
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*/
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nir_def *pixel = nir_f2u32(b, nir_channels(b, nir_load_frag_coord(b), 0x3));
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nir_def *rotate_amount =
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nir_iadd(b, nir_iand_imm(b, nir_channel(b, pixel, 0), 0x1),
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nir_iand_imm(b, nir_channel(b, pixel, 1), 0x1));
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mask = nir_ior(b, nir_ushr(b, mask, rotate_amount),
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nir_ishl(b, mask, nir_isub_imm(b, 16, rotate_amount)));
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return nir_u2u32(b, mask);
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}
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/*
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* Lower alpha-to-coverage to sample_mask and some math. May run on either a
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* monolithic pixel shader or a fragment epilogue.
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*/
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bool
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nir_lower_alpha_to_coverage(nir_shader *shader, bool has_intrinsic, nir_def *dyn_enable)
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{
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/* nir_lower_io_to_temporaries ensures that stores are in the last block */
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nir_function_impl *impl = nir_shader_get_entrypoint(shader);
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nir_block *block = nir_impl_last_block(impl);
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/* The store is probably at the end of the block, so search in reverse. */
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nir_intrinsic_instr *store = NULL;
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nir_foreach_instr_reverse(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (intr->intrinsic != nir_intrinsic_store_output)
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continue;
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nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
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if (sem.location != FRAG_RESULT_DATA0)
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continue;
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if (sem.dual_source_blend_index != 0)
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continue;
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store = intr;
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break;
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}
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/* If render target 0 isn't written, the alpha value input to
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* alpha-to-coverage is undefined. We assume that the alpha would be 1.0,
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* which would effectively disable alpha-to-coverage, skipping the lowering.
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*
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* Similarly, if there are less than 4 components, alpha is undefined.
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*/
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nir_def *rgba = store ? store->src[0].ssa : NULL;
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if (!rgba || rgba->num_components < 4) {
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return nir_no_progress(impl);
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}
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nir_builder _b = nir_builder_at(nir_before_instr(&store->instr));
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nir_builder *b = &_b;
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nir_def *alpha = nir_channel(b, rgba, 3);
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if (dyn_enable)
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alpha = nir_bcsel(b, dyn_enable, alpha, nir_imm_floatN_t(b, 1.0f, alpha->bit_size));
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nir_def *mask = alpha_to_coverage(b, alpha, has_intrinsic);
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/* Discard samples that aren't covered */
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nir_demote_samples(b, nir_inot(b, mask));
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shader->info.fs.uses_discard = true;
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return nir_progress(true, impl, nir_metadata_control_flow);
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}
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/*
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* Modify the inputs to store_output instructions in a pixel shader when
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* alpha-to-one is used. May run on either a monolithic pixel shader or a
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* fragment epilogue.
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*/
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bool
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nir_lower_alpha_to_one(nir_shader *shader)
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{
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bool progress = false;
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/* nir_lower_io_to_temporaries ensures that stores are in the last block */
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nir_function_impl *impl = nir_shader_get_entrypoint(shader);
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nir_block *block = nir_impl_last_block(impl);
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nir_foreach_instr(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (intr->intrinsic != nir_intrinsic_store_output)
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continue;
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/* The OpenGL spec is a bit confusing here, but seemingly alpha-to-one
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* applies to all render targets. Piglit
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* ext_framebuffer_multisample-draw-buffers-alpha-to-one checks this.
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*
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* Even more confusingly, it seems to apply to dual-source blending too.
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* ext_framebuffer_multisample-alpha-to-one-dual-src-blend checks this.
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*/
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nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
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if (sem.location < FRAG_RESULT_DATA0)
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continue;
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nir_def *rgba = intr->src[0].ssa;
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if (rgba->num_components < 4)
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continue;
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nir_builder b = nir_builder_at(nir_before_instr(instr));
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nir_def *rgb1 = nir_vector_insert_imm(
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&b, rgba, nir_imm_floatN_t(&b, 1.0, rgba->bit_size), 3);
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nir_src_rewrite(&intr->src[0], rgb1);
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progress = true;
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}
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return nir_progress(progress, impl, nir_metadata_control_flow);
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}
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