mesa/src/amd
Ian Romanick d41cdef2a5 nir: Use the flrp lowering pass instead of nir_opt_algebraic
I tried to be very careful while updating all the various drivers, but I
don't have any of that hardware for testing. :(

i965 is the only platform that sets always_precise = true, and it is
only set true for fragment shaders.  Gen4 and Gen5 both set lower_flrp32
only for vertex shaders.  For fragment shaders, nir_op_flrp is lowered
during code generation as a(1-c)+bc.  On all other platforms 64-bit
nir_op_flrp and on Gen11 32-bit nir_op_flrp are lowered using the old
nir_opt_algebraic method.

No changes on any other Intel platforms.

v2: Add panfrost changes.

Iron Lake and GM45 had similar results. (Iron Lake shown)
total cycles in shared programs: 188647754 -> 188647748 (<.01%)
cycles in affected programs: 5096 -> 5090 (-0.12%)
helped: 3
HURT: 0
helped stats (abs) min: 2 max: 2 x̄: 2.00 x̃: 2
helped stats (rel) min: 0.12% max: 0.12% x̄: 0.12% x̃: 0.12%

Reviewed-by: Matt Turner <mattst88@gmail.com>
2019-05-06 22:52:29 -07:00
..
addrlib amd/addrlib: fix uninitialized values for Addr2ComputeDccAddrFromCoord 2019-04-04 09:30:40 -04:00
common radv: apply the indexing workaround for atomic buffer operations on GFX9 2019-05-03 17:59:12 +02:00
vulkan nir: Use the flrp lowering pass instead of nir_opt_algebraic 2019-05-06 22:52:29 -07:00
Android.addrlib.mk android: amd/addrlib: update Mesa's copy of addrlib 2018-12-01 01:13:53 +01:00
Android.common.mk Android: fix undeclared identifier 'gfx9d_reg_table' 2017-09-11 09:35:23 -05:00
Android.mk android: radv: build vulkan.radv conditionally to radeonsi 2018-08-03 20:09:16 +02:00
Makefile.sources amd/addrlib: drop si_ci_vi_merged_enum.h from the list 2018-12-10 16:35:01 +00:00
meson.build meson: build "radv" vulkan driver for radeon hardware 2017-09-27 09:12:34 -07:00