mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-25 00:00:11 +01:00
ee4d51f8b2
When line smoothing is enabled, the driver now increases the width of
the line so that it can add some semi-transparent pixels to either side
of the line. A lowering pass is added which modifies the alpha component
of every write to fragment output 0 so that if the fragment is outside
the width of the line then the alpha is reduced. It additionally
discards fragments that are completely invisible. It might seem bad to
use discard on a tiled renderer but the assumption is that any bad
effects from using discard will also happen anyway because of enabling
alpha blending.
v2: Disable the line smoothing pass entirely when the framebuffer
contains an integer colour output or one with no alpha channel.
Calculate the coverage once upfront and store in a global variable
instead of calculating each time an output write is modified. Also
do the conditional discard once upfront.
v3: Don’t check whether the output buffer has an alpha channel. Only
look at output 0. Use aa_line_width intrinsic instead of calculating
the real line width in the shader. Clamp the coverage as part of the
global variable, not per output write.
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5624>
499 lines
20 KiB
C
499 lines
20 KiB
C
/*
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* Copyright © 2014-2017 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "util/u_pack_color.h"
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#include "util/u_upload_mgr.h"
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#include "util/format_srgb.h"
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#include "v3d_context.h"
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#include "compiler/v3d_compiler.h"
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#include "broadcom/cle/v3d_packet_v33_pack.h"
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static uint32_t
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get_texrect_scale(struct v3d_texture_stateobj *texstate,
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enum quniform_contents contents,
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uint32_t data)
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{
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struct pipe_sampler_view *texture = texstate->textures[data];
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uint32_t dim;
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if (contents == QUNIFORM_TEXRECT_SCALE_X)
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dim = texture->texture->width0;
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else
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dim = texture->texture->height0;
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return fui(1.0f / dim);
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}
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static uint32_t
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get_texture_size(struct v3d_texture_stateobj *texstate,
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enum quniform_contents contents,
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uint32_t data)
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{
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struct pipe_sampler_view *texture = texstate->textures[data];
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switch (contents) {
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case QUNIFORM_TEXTURE_WIDTH:
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return u_minify(texture->texture->width0,
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texture->u.tex.first_level);
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case QUNIFORM_TEXTURE_HEIGHT:
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return u_minify(texture->texture->height0,
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texture->u.tex.first_level);
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case QUNIFORM_TEXTURE_DEPTH:
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return u_minify(texture->texture->depth0,
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texture->u.tex.first_level);
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case QUNIFORM_TEXTURE_ARRAY_SIZE:
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return texture->texture->array_size;
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case QUNIFORM_TEXTURE_LEVELS:
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return (texture->u.tex.last_level -
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texture->u.tex.first_level) + 1;
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default:
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unreachable("Bad texture size field");
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}
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}
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static uint32_t
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get_image_size(struct v3d_shaderimg_stateobj *shaderimg,
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enum quniform_contents contents,
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uint32_t data)
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{
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struct v3d_image_view *image = &shaderimg->si[data];
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switch (contents) {
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case QUNIFORM_IMAGE_WIDTH:
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return u_minify(image->base.resource->width0,
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image->base.u.tex.level);
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case QUNIFORM_IMAGE_HEIGHT:
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return u_minify(image->base.resource->height0,
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image->base.u.tex.level);
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case QUNIFORM_IMAGE_DEPTH:
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return u_minify(image->base.resource->depth0,
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image->base.u.tex.level);
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case QUNIFORM_IMAGE_ARRAY_SIZE:
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return image->base.resource->array_size;
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default:
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unreachable("Bad texture size field");
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}
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}
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/**
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* Writes the V3D 3.x P0 (CFG_MODE=1) texture parameter.
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*
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* Some bits of this field are dependent on the type of sample being done by
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* the shader, while other bits are dependent on the sampler state. We OR the
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* two together here.
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*/
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static void
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write_texture_p0(struct v3d_job *job,
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struct v3d_cl_out **uniforms,
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struct v3d_texture_stateobj *texstate,
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uint32_t unit,
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uint32_t shader_data)
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{
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struct pipe_sampler_state *psampler = texstate->samplers[unit];
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struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
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cl_aligned_u32(uniforms, shader_data | sampler->p0);
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}
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/** Writes the V3D 3.x P1 (CFG_MODE=1) texture parameter. */
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static void
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write_texture_p1(struct v3d_job *job,
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struct v3d_cl_out **uniforms,
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struct v3d_texture_stateobj *texstate,
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uint32_t data)
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{
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/* Extract the texture unit from the top bits, and the compiler's
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* packed p1 from the bottom.
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*/
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uint32_t unit = data >> 5;
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uint32_t p1 = data & 0x1f;
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struct pipe_sampler_view *psview = texstate->textures[unit];
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struct v3d_sampler_view *sview = v3d_sampler_view(psview);
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struct V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1 unpacked = {
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.texture_state_record_base_address = texstate->texture_state[unit],
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};
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uint32_t packed;
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V3D33_TEXTURE_UNIFORM_PARAMETER_1_CFG_MODE1_pack(&job->indirect,
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(uint8_t *)&packed,
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&unpacked);
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cl_aligned_u32(uniforms, p1 | packed | sview->p1);
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}
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/** Writes the V3D 4.x TMU configuration parameter 0. */
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static void
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write_tmu_p0(struct v3d_job *job,
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struct v3d_cl_out **uniforms,
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struct v3d_texture_stateobj *texstate,
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uint32_t data)
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{
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int unit = v3d_unit_data_get_unit(data);
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struct pipe_sampler_view *psview = texstate->textures[unit];
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struct v3d_sampler_view *sview = v3d_sampler_view(psview);
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struct v3d_resource *rsc = v3d_resource(sview->texture);
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cl_aligned_reloc(&job->indirect, uniforms, sview->bo,
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v3d_unit_data_get_offset(data));
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v3d_job_add_bo(job, rsc->bo);
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}
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static void
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write_image_tmu_p0(struct v3d_job *job,
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struct v3d_cl_out **uniforms,
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struct v3d_shaderimg_stateobj *img,
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uint32_t data)
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{
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/* Extract the image unit from the top bits, and the compiler's
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* packed p0 from the bottom.
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*/
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uint32_t unit = data >> 24;
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uint32_t p0 = data & 0x00ffffff;
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struct v3d_image_view *iview = &img->si[unit];
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struct v3d_resource *rsc = v3d_resource(iview->base.resource);
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cl_aligned_reloc(&job->indirect, uniforms,
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v3d_resource(iview->tex_state)->bo,
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iview->tex_state_offset | p0);
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v3d_job_add_bo(job, rsc->bo);
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}
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/** Writes the V3D 4.x TMU configuration parameter 1. */
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static void
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write_tmu_p1(struct v3d_job *job,
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struct v3d_cl_out **uniforms,
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struct v3d_texture_stateobj *texstate,
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uint32_t data)
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{
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uint32_t unit = v3d_unit_data_get_unit(data);
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struct pipe_sampler_state *psampler = texstate->samplers[unit];
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struct v3d_sampler_state *sampler = v3d_sampler_state(psampler);
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struct pipe_sampler_view *psview = texstate->textures[unit];
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struct v3d_sampler_view *sview = v3d_sampler_view(psview);
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int variant = 0;
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if (sampler->border_color_variants)
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variant = sview->sampler_variant;
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cl_aligned_reloc(&job->indirect, uniforms,
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v3d_resource(sampler->sampler_state)->bo,
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sampler->sampler_state_offset[variant] |
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v3d_unit_data_get_offset(data));
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}
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struct v3d_cl_reloc
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v3d_write_uniforms(struct v3d_context *v3d, struct v3d_job *job,
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struct v3d_compiled_shader *shader,
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enum pipe_shader_type stage)
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{
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struct v3d_constbuf_stateobj *cb = &v3d->constbuf[stage];
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struct v3d_texture_stateobj *texstate = &v3d->tex[stage];
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struct v3d_uniform_list *uinfo = &shader->prog_data.base->uniforms;
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const uint32_t *gallium_uniforms = cb->cb[0].user_buffer;
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/* The hardware always pre-fetches the next uniform (also when there
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* aren't any), so we always allocate space for an extra slot. This
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* fixes MMU exceptions reported since Linux kernel 5.4 when the
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* uniforms fill up the tail bytes of a page in the indirect
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* BO. In that scenario, when the hardware pre-fetches after reading
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* the last uniform it will read beyond the end of the page and trigger
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* the MMU exception.
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*/
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v3d_cl_ensure_space(&job->indirect, (uinfo->count + 1) * 4, 4);
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struct v3d_cl_reloc uniform_stream = cl_get_address(&job->indirect);
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v3d_bo_reference(uniform_stream.bo);
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struct v3d_cl_out *uniforms =
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cl_start(&job->indirect);
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for (int i = 0; i < uinfo->count; i++) {
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uint32_t data = uinfo->data[i];
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switch (uinfo->contents[i]) {
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case QUNIFORM_CONSTANT:
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cl_aligned_u32(&uniforms, data);
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break;
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case QUNIFORM_UNIFORM:
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cl_aligned_u32(&uniforms, gallium_uniforms[data]);
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break;
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case QUNIFORM_VIEWPORT_X_SCALE:
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cl_aligned_f(&uniforms, v3d->viewport.scale[0] * 256.0f);
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break;
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case QUNIFORM_VIEWPORT_Y_SCALE:
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cl_aligned_f(&uniforms, v3d->viewport.scale[1] * 256.0f);
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break;
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case QUNIFORM_VIEWPORT_Z_OFFSET:
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cl_aligned_f(&uniforms, v3d->viewport.translate[2]);
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break;
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case QUNIFORM_VIEWPORT_Z_SCALE:
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cl_aligned_f(&uniforms, v3d->viewport.scale[2]);
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break;
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case QUNIFORM_USER_CLIP_PLANE:
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cl_aligned_f(&uniforms,
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v3d->clip.ucp[data / 4][data % 4]);
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break;
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case QUNIFORM_TMU_CONFIG_P0:
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write_tmu_p0(job, &uniforms, texstate, data);
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break;
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case QUNIFORM_TMU_CONFIG_P1:
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write_tmu_p1(job, &uniforms, texstate, data);
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break;
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case QUNIFORM_IMAGE_TMU_CONFIG_P0:
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write_image_tmu_p0(job, &uniforms,
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&v3d->shaderimg[stage], data);
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break;
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case QUNIFORM_TEXTURE_CONFIG_P1:
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write_texture_p1(job, &uniforms, texstate,
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data);
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break;
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case QUNIFORM_TEXRECT_SCALE_X:
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case QUNIFORM_TEXRECT_SCALE_Y:
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cl_aligned_u32(&uniforms,
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get_texrect_scale(texstate,
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uinfo->contents[i],
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data));
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break;
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case QUNIFORM_TEXTURE_WIDTH:
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case QUNIFORM_TEXTURE_HEIGHT:
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case QUNIFORM_TEXTURE_DEPTH:
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case QUNIFORM_TEXTURE_ARRAY_SIZE:
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case QUNIFORM_TEXTURE_LEVELS:
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cl_aligned_u32(&uniforms,
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get_texture_size(texstate,
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uinfo->contents[i],
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data));
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break;
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case QUNIFORM_IMAGE_WIDTH:
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case QUNIFORM_IMAGE_HEIGHT:
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case QUNIFORM_IMAGE_DEPTH:
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case QUNIFORM_IMAGE_ARRAY_SIZE:
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cl_aligned_u32(&uniforms,
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get_image_size(&v3d->shaderimg[stage],
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uinfo->contents[i],
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data));
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break;
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case QUNIFORM_ALPHA_REF:
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cl_aligned_f(&uniforms,
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v3d->zsa->base.alpha.ref_value);
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break;
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case QUNIFORM_LINE_WIDTH:
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cl_aligned_f(&uniforms,
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v3d->rasterizer->base.line_width);
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break;
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case QUNIFORM_AA_LINE_WIDTH:
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cl_aligned_f(&uniforms, v3d_get_real_line_width(v3d));
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break;
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case QUNIFORM_UBO_ADDR: {
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uint32_t unit = v3d_unit_data_get_unit(data);
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/* Constant buffer 0 may be a system memory pointer,
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* in which case we want to upload a shadow copy to
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* the GPU.
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*/
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if (!cb->cb[unit].buffer) {
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u_upload_data(v3d->uploader, 0,
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cb->cb[unit].buffer_size, 16,
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cb->cb[unit].user_buffer,
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&cb->cb[unit].buffer_offset,
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&cb->cb[unit].buffer);
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}
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cl_aligned_reloc(&job->indirect, &uniforms,
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v3d_resource(cb->cb[unit].buffer)->bo,
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cb->cb[unit].buffer_offset +
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v3d_unit_data_get_offset(data));
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break;
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}
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case QUNIFORM_SSBO_OFFSET: {
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struct pipe_shader_buffer *sb =
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&v3d->ssbo[stage].sb[data];
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cl_aligned_reloc(&job->indirect, &uniforms,
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v3d_resource(sb->buffer)->bo,
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sb->buffer_offset);
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break;
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}
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case QUNIFORM_GET_BUFFER_SIZE:
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cl_aligned_u32(&uniforms,
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v3d->ssbo[stage].sb[data].buffer_size);
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break;
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case QUNIFORM_TEXTURE_FIRST_LEVEL:
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cl_aligned_f(&uniforms,
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texstate->textures[data]->u.tex.first_level);
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break;
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case QUNIFORM_SPILL_OFFSET:
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cl_aligned_reloc(&job->indirect, &uniforms,
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v3d->prog.spill_bo, 0);
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break;
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case QUNIFORM_SPILL_SIZE_PER_THREAD:
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cl_aligned_u32(&uniforms,
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v3d->prog.spill_size_per_thread);
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break;
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case QUNIFORM_NUM_WORK_GROUPS:
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cl_aligned_u32(&uniforms,
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v3d->compute_num_workgroups[data]);
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break;
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case QUNIFORM_SHARED_OFFSET:
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cl_aligned_reloc(&job->indirect, &uniforms,
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v3d->compute_shared_memory, 0);
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break;
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case QUNIFORM_FB_LAYERS:
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cl_aligned_u32(&uniforms, job->num_layers);
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break;
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default:
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assert(quniform_contents_is_texture_p0(uinfo->contents[i]));
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write_texture_p0(job, &uniforms, texstate,
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uinfo->contents[i] -
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QUNIFORM_TEXTURE_CONFIG_P0_0,
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data);
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break;
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}
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#if 0
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uint32_t written_val = *((uint32_t *)uniforms - 1);
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fprintf(stderr, "shader %p[%d]: 0x%08x / 0x%08x (%f) ",
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shader, i, __gen_address_offset(&uniform_stream) + i * 4,
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written_val, uif(written_val));
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vir_dump_uniform(uinfo->contents[i], data);
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fprintf(stderr, "\n");
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#endif
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}
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cl_end(&job->indirect, uniforms);
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return uniform_stream;
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}
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void
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v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader)
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{
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uint32_t dirty = 0;
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for (int i = 0; i < shader->prog_data.base->uniforms.count; i++) {
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switch (shader->prog_data.base->uniforms.contents[i]) {
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case QUNIFORM_CONSTANT:
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break;
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case QUNIFORM_UNIFORM:
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case QUNIFORM_UBO_ADDR:
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dirty |= VC5_DIRTY_CONSTBUF;
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break;
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case QUNIFORM_VIEWPORT_X_SCALE:
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case QUNIFORM_VIEWPORT_Y_SCALE:
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case QUNIFORM_VIEWPORT_Z_OFFSET:
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case QUNIFORM_VIEWPORT_Z_SCALE:
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dirty |= VC5_DIRTY_VIEWPORT;
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break;
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case QUNIFORM_USER_CLIP_PLANE:
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dirty |= VC5_DIRTY_CLIP;
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break;
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case QUNIFORM_TMU_CONFIG_P0:
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case QUNIFORM_TMU_CONFIG_P1:
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case QUNIFORM_TEXTURE_CONFIG_P1:
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case QUNIFORM_TEXTURE_FIRST_LEVEL:
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case QUNIFORM_TEXRECT_SCALE_X:
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case QUNIFORM_TEXRECT_SCALE_Y:
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case QUNIFORM_TEXTURE_WIDTH:
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case QUNIFORM_TEXTURE_HEIGHT:
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case QUNIFORM_TEXTURE_DEPTH:
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case QUNIFORM_TEXTURE_ARRAY_SIZE:
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case QUNIFORM_TEXTURE_LEVELS:
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case QUNIFORM_SPILL_OFFSET:
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case QUNIFORM_SPILL_SIZE_PER_THREAD:
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/* We could flag this on just the stage we're
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* compiling for, but it's not passed in.
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*/
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dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX |
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VC5_DIRTY_GEOMTEX | VC5_DIRTY_COMPTEX;
|
|
break;
|
|
|
|
case QUNIFORM_SSBO_OFFSET:
|
|
case QUNIFORM_GET_BUFFER_SIZE:
|
|
dirty |= VC5_DIRTY_SSBO;
|
|
break;
|
|
|
|
case QUNIFORM_IMAGE_TMU_CONFIG_P0:
|
|
case QUNIFORM_IMAGE_WIDTH:
|
|
case QUNIFORM_IMAGE_HEIGHT:
|
|
case QUNIFORM_IMAGE_DEPTH:
|
|
case QUNIFORM_IMAGE_ARRAY_SIZE:
|
|
dirty |= VC5_DIRTY_SHADER_IMAGE;
|
|
break;
|
|
|
|
case QUNIFORM_ALPHA_REF:
|
|
dirty |= VC5_DIRTY_ZSA;
|
|
break;
|
|
|
|
case QUNIFORM_LINE_WIDTH:
|
|
case QUNIFORM_AA_LINE_WIDTH:
|
|
dirty |= VC5_DIRTY_RASTERIZER;
|
|
break;
|
|
|
|
case QUNIFORM_NUM_WORK_GROUPS:
|
|
case QUNIFORM_SHARED_OFFSET:
|
|
/* Compute always recalculates uniforms. */
|
|
break;
|
|
|
|
case QUNIFORM_FB_LAYERS:
|
|
dirty |= VC5_DIRTY_FRAMEBUFFER;
|
|
break;
|
|
|
|
default:
|
|
assert(quniform_contents_is_texture_p0(shader->prog_data.base->uniforms.contents[i]));
|
|
dirty |= VC5_DIRTY_FRAGTEX | VC5_DIRTY_VERTTEX |
|
|
VC5_DIRTY_GEOMTEX | VC5_DIRTY_COMPTEX;
|
|
break;
|
|
}
|
|
}
|
|
|
|
shader->uniform_dirty_bits = dirty;
|
|
}
|