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bfb6c41b64
Reported by clang tools. See: https://clangd.llvm.org/guides/include-cleaner struct ac_cmdbuf had to be moved to ac_cmdbuf_base.h because we can't include ac_cmdbuf.h->sid.h->amdgfxregs.h in radeon_winsys.h for r300. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41091>
154 lines
9.1 KiB
C
154 lines
9.1 KiB
C
/**************************************************************************
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*
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* Copyright 2024 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: MIT
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*
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**************************************************************************/
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#include <stdbool.h>
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#include "ac_vcn_enc.h"
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#include "ac_gpu_info.h"
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#define RENCODE_IB_PARAM_SESSION_INFO 0x00000001
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#define RENCODE_IB_PARAM_TASK_INFO 0x00000002
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#define RENCODE_IB_PARAM_SESSION_INIT 0x00000003
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#define RENCODE_IB_PARAM_LAYER_CONTROL 0x00000004
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#define RENCODE_IB_PARAM_LAYER_SELECT 0x00000005
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#define RENCODE_IB_PARAM_RATE_CONTROL_SESSION_INIT 0x00000006
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#define RENCODE_IB_PARAM_RATE_CONTROL_LAYER_INIT 0x00000007
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#define RENCODE_IB_PARAM_RATE_CONTROL_PER_PICTURE 0x00000008
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#define RENCODE_IB_PARAM_QUALITY_PARAMS 0x00000009
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#define RENCODE_IB_PARAM_SLICE_HEADER 0x0000000a
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#define RENCODE_IB_PARAM_ENCODE_PARAMS 0x0000000b
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#define RENCODE_IB_PARAM_INTRA_REFRESH 0x0000000c
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#define RENCODE_IB_PARAM_ENCODE_CONTEXT_BUFFER 0x0000000d
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#define RENCODE_IB_PARAM_VIDEO_BITSTREAM_BUFFER 0x0000000e
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#define RENCODE_IB_PARAM_FEEDBACK_BUFFER 0x00000010
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#define RENCODE_IB_PARAM_RATE_CONTROL_PER_PICTURE_EX 0x0000001d
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#define RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU 0x00000020
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#define RENCODE_IB_PARAM_QP_MAP 0x00000021
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#define RENCODE_IB_PARAM_ENCODE_LATENCY 0x00000022
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#define RENCODE_IB_PARAM_ENCODE_STATISTICS 0x00000024
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#define RENCODE_HEVC_IB_PARAM_SLICE_CONTROL 0x00100001
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#define RENCODE_HEVC_IB_PARAM_SPEC_MISC 0x00100002
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#define RENCODE_HEVC_IB_PARAM_DEBLOCKING_FILTER 0x00100003
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#define RENCODE_HEVC_IB_PARAM_SLICE_INFO_VAR 0x00100004
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#define RENCODE_H264_IB_PARAM_SLICE_CONTROL 0x00200001
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#define RENCODE_H264_IB_PARAM_SPEC_MISC 0x00200002
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#define RENCODE_H264_IB_PARAM_ENCODE_PARAMS 0x00200003
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#define RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER 0x00200004
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#define RENCODE_H264_IB_PARAM_SLICE_INFO_VAR 0x00200005
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#define RENCODE_V2_IB_PARAM_DIRECT_OUTPUT_NALU 0x0000000a
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#define RENCODE_V2_IB_PARAM_SLICE_HEADER 0x0000000b
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#define RENCODE_V2_IB_PARAM_INPUT_FORMAT 0x0000000c
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#define RENCODE_V2_IB_PARAM_OUTPUT_FORMAT 0x0000000d
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#define RENCODE_V2_IB_PARAM_ENCODE_PARAMS 0x0000000f
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#define RENCODE_V2_IB_PARAM_INTRA_REFRESH 0x00000010
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#define RENCODE_V2_IB_PARAM_ENCODE_CONTEXT_BUFFER 0x00000011
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#define RENCODE_V2_IB_PARAM_VIDEO_BITSTREAM_BUFFER 0x00000012
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#define RENCODE_V2_IB_PARAM_QP_MAP 0x00000014
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#define RENCODE_V2_IB_PARAM_FEEDBACK_BUFFER 0x00000015
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#define RENCODE_V2_IB_PARAM_ENCODE_LATENCY 0x00000018
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#define RENCODE_V2_IB_PARAM_ENCODE_STATISTICS 0x00000019
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#define RENCODE_V4_IB_PARAM_CDF_DEFAULT_TABLE_BUFFER 0x00000019
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#define RENCODE_V4_IB_PARAM_ENCODE_STATISTICS 0x0000001a
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#define RENCODE_V4_AV1_IB_PARAM_SPEC_MISC 0x00300001
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#define RENCODE_V4_AV1_IB_PARAM_BITSTREAM_INSTRUCTION 0x00300002
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#define RENCODE_V5_IB_PARAM_METADATA_BUFFER 0x0000001c
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#define RENCODE_V5_IB_PARAM_ENCODE_CONTEXT_BUFFER_OVERRIDE 0x0000001d
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#define RENCODE_V5_HEVC_IB_PARAM_ENCODE_PARAMS 0x00100004
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#define RENCODE_V5_HEVC_IB_PARAM_SLICE_INFO_VAR 0x00100005
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#define RENCODE_V5_AV1_IB_PARAM_TILE_CONFIG 0x00300002
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#define RENCODE_V5_AV1_IB_PARAM_BITSTREAM_INSTRUCTION 0x00300003
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#define RENCODE_V5_AV1_IB_PARAM_ENCODE_PARAMS 0x00300004
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void ac_vcn_enc_init_cmds(rvcn_enc_cmd_t *cmd, enum vcn_version version)
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{
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cmd->session_info = RENCODE_IB_PARAM_SESSION_INFO;
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cmd->task_info = RENCODE_IB_PARAM_TASK_INFO;
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cmd->session_init = RENCODE_IB_PARAM_SESSION_INIT;
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cmd->layer_control = RENCODE_IB_PARAM_LAYER_CONTROL;
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cmd->layer_select = RENCODE_IB_PARAM_LAYER_SELECT;
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cmd->rc_session_init = RENCODE_IB_PARAM_RATE_CONTROL_SESSION_INIT;
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cmd->rc_layer_init = RENCODE_IB_PARAM_RATE_CONTROL_LAYER_INIT;
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cmd->rc_per_pic = RENCODE_IB_PARAM_RATE_CONTROL_PER_PICTURE;
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cmd->rc_per_pic_ex = RENCODE_IB_PARAM_RATE_CONTROL_PER_PICTURE_EX;
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cmd->quality_params = RENCODE_IB_PARAM_QUALITY_PARAMS;
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cmd->nalu = RENCODE_IB_PARAM_DIRECT_OUTPUT_NALU;
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cmd->slice_header = RENCODE_IB_PARAM_SLICE_HEADER;
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cmd->enc_params = RENCODE_IB_PARAM_ENCODE_PARAMS;
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cmd->intra_refresh = RENCODE_IB_PARAM_INTRA_REFRESH;
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cmd->ctx = RENCODE_IB_PARAM_ENCODE_CONTEXT_BUFFER;
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cmd->bitstream = RENCODE_IB_PARAM_VIDEO_BITSTREAM_BUFFER;
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cmd->feedback = RENCODE_IB_PARAM_FEEDBACK_BUFFER;
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cmd->slice_control_hevc = RENCODE_HEVC_IB_PARAM_SLICE_CONTROL;
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cmd->spec_misc_hevc = RENCODE_HEVC_IB_PARAM_SPEC_MISC;
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cmd->deblocking_filter_hevc = RENCODE_HEVC_IB_PARAM_DEBLOCKING_FILTER;
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cmd->slice_control_h264 = RENCODE_H264_IB_PARAM_SLICE_CONTROL;
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cmd->spec_misc_h264 = RENCODE_H264_IB_PARAM_SPEC_MISC;
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cmd->enc_params_h264 = RENCODE_H264_IB_PARAM_ENCODE_PARAMS;
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cmd->deblocking_filter_h264 = RENCODE_H264_IB_PARAM_DEBLOCKING_FILTER;
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cmd->enc_statistics = RENCODE_IB_PARAM_ENCODE_STATISTICS;
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cmd->enc_qp_map = RENCODE_IB_PARAM_QP_MAP;
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cmd->enc_latency = RENCODE_IB_PARAM_ENCODE_LATENCY;
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if (version >= VCN_2_0_0) {
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cmd->nalu = RENCODE_V2_IB_PARAM_DIRECT_OUTPUT_NALU;
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cmd->slice_header = RENCODE_V2_IB_PARAM_SLICE_HEADER;
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cmd->input_format = RENCODE_V2_IB_PARAM_INPUT_FORMAT;
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cmd->output_format = RENCODE_V2_IB_PARAM_OUTPUT_FORMAT;
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cmd->enc_params = RENCODE_V2_IB_PARAM_ENCODE_PARAMS;
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cmd->intra_refresh = RENCODE_V2_IB_PARAM_INTRA_REFRESH;
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cmd->ctx = RENCODE_V2_IB_PARAM_ENCODE_CONTEXT_BUFFER;
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cmd->bitstream = RENCODE_V2_IB_PARAM_VIDEO_BITSTREAM_BUFFER;
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cmd->feedback = RENCODE_V2_IB_PARAM_FEEDBACK_BUFFER;
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cmd->enc_statistics = RENCODE_V2_IB_PARAM_ENCODE_STATISTICS;
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cmd->enc_qp_map = RENCODE_V2_IB_PARAM_QP_MAP;
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cmd->enc_latency = RENCODE_V2_IB_PARAM_ENCODE_LATENCY;
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}
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if (version >= VCN_4_0_0) {
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cmd->cdf_default_table_av1 = RENCODE_V4_IB_PARAM_CDF_DEFAULT_TABLE_BUFFER;
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cmd->enc_statistics = RENCODE_V4_IB_PARAM_ENCODE_STATISTICS;
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cmd->spec_misc_av1 = RENCODE_V4_AV1_IB_PARAM_SPEC_MISC;
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cmd->bitstream_instruction_av1 = RENCODE_V4_AV1_IB_PARAM_BITSTREAM_INSTRUCTION;
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cmd->slice_info_h264 = RENCODE_H264_IB_PARAM_SLICE_INFO_VAR;
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cmd->slice_info_hevc = RENCODE_HEVC_IB_PARAM_SLICE_INFO_VAR;
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}
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if (version >= VCN_5_0_0) {
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cmd->metadata = RENCODE_V5_IB_PARAM_METADATA_BUFFER;
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cmd->ctx_override = RENCODE_V5_IB_PARAM_ENCODE_CONTEXT_BUFFER_OVERRIDE;
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cmd->enc_params_hevc = RENCODE_V5_HEVC_IB_PARAM_ENCODE_PARAMS;
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cmd->tile_config_av1 = RENCODE_V5_AV1_IB_PARAM_TILE_CONFIG;
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cmd->bitstream_instruction_av1 = RENCODE_V5_AV1_IB_PARAM_BITSTREAM_INSTRUCTION;
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cmd->enc_params_av1 = RENCODE_V5_AV1_IB_PARAM_ENCODE_PARAMS;
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cmd->slice_info_hevc = RENCODE_V5_HEVC_IB_PARAM_SLICE_INFO_VAR;
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}
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}
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bool
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ac_vcn_enc_variable_slice_mode_supported(const struct radeon_info *info, bool preencode)
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{
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if (info->vcn_ip_version >= VCN_5_0_0) {
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if (preencode)
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return info->vcn_enc_minor_version > 12 ||
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(info->vcn_enc_minor_version == 12 && info->vcn_fw_revision >= 0xA);
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else
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return info->vcn_enc_minor_version >= 11;
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} else if (info->vcn_ip_version >= VCN_4_0_0) {
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if (preencode)
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return info->vcn_enc_minor_version > 24 ||
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(info->vcn_enc_minor_version == 24 && info->vcn_fw_revision >= 0x23);
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else
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return info->vcn_enc_minor_version >= 24;
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} else
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return false;
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}
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