mesa/src/nouveau/codegen
George Ouzounoudis eb5cabf3ae nouveau/codegen: Add a 4th optimization level for MemoryOpts
MemoryOpt optimization pass makes some tests in NVK fail. Until its
fixed in codegen or implemented on NIR instead, move it to a 4th level.
This affects the GL driver as well, but less often.

Fixes dEQP-VK.pipeline.monolithic.dynamic_control_points.change_output*

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24705>
2023-08-21 14:26:34 +00:00
..
lib
meson.build nouveau: Delete nv50_ir_from_tgsi.cpp 2023-07-21 02:40:35 +00:00
nv50_ir.cpp nv/codegen: Use nir_lower_clip 2023-08-19 15:34:28 +00:00
nv50_ir.h nouveau/codegen: Use a NULL format for PIPE_FORMAT_NONE for images 2023-08-01 18:58:03 +00:00
nv50_ir_bb.cpp nv50/ir: Remove Function.stackPtr 2023-07-19 11:47:10 +00:00
nv50_ir_build_util.cpp nouveau: Drop BuildUtil::DataArray 2023-07-21 02:40:35 +00:00
nv50_ir_build_util.h nouveau: Drop BuildUtil::Location 2023-07-21 02:40:36 +00:00
nv50_ir_driver.h nouveau/codegen: Add a 4th optimization level for MemoryOpts 2023-08-21 14:26:34 +00:00
nv50_ir_emit_gk110.cpp
nv50_ir_emit_gm107.cpp gm107/ir: fix SULDP for loads without a known format 2023-07-25 23:15:41 +00:00
nv50_ir_emit_gv100.cpp gv100/ir: noop OP_BAR for now 2022-11-09 21:21:22 +00:00
nv50_ir_emit_gv100.h
nv50_ir_emit_nv50.cpp
nv50_ir_emit_nvc0.cpp
nv50_ir_from_common.cpp nv/codegen: Use nir_lower_clip 2023-08-19 15:34:28 +00:00
nv50_ir_from_common.h nv/codegen: Use nir_lower_clip 2023-08-19 15:34:28 +00:00
nv50_ir_from_nir.cpp nv/codegen: Use nir_lower_clip 2023-08-19 15:34:28 +00:00
nv50_ir_graph.cpp
nv50_ir_graph.h
nv50_ir_inlines.h
nv50_ir_lowering_gm107.cpp
nv50_ir_lowering_gm107.h nv50/ir: resolve -Woverloaded-virtual=1 warnings 2023-06-15 18:48:10 +00:00
nv50_ir_lowering_gv100.cpp
nv50_ir_lowering_gv100.h
nv50_ir_lowering_helper.cpp
nv50_ir_lowering_helper.h
nv50_ir_lowering_nv50.cpp
nv50_ir_lowering_nvc0.cpp nv50/ir: Rework conversions for texture array indices 2023-08-11 06:02:23 +00:00
nv50_ir_lowering_nvc0.h nv50/ir: resolve -Woverloaded-virtual=1 warnings 2023-06-15 18:48:10 +00:00
nv50_ir_peephole.cpp nouveau/codegen: Add a 4th optimization level for MemoryOpts 2023-08-21 14:26:34 +00:00
nv50_ir_print.cpp nv50/ir: use own info struct for sys vals 2023-08-05 00:35:57 +02:00
nv50_ir_ra.cpp nv50/ir: Remove SpillSlot 2023-07-19 11:47:10 +00:00
nv50_ir_sched_gm107.h
nv50_ir_serialize.cpp nouveau: Drop tgsi support from nv50_ir_prog_info 2023-07-21 02:40:35 +00:00
nv50_ir_ssa.cpp nouveau: Make getSize return unsigned int 2023-03-17 16:08:33 +00:00
nv50_ir_target.cpp nvc0: initial Ada enablement 2023-07-19 09:08:16 +00:00
nv50_ir_target.h
nv50_ir_target_gm107.cpp
nv50_ir_target_gm107.h
nv50_ir_target_gv100.cpp
nv50_ir_target_gv100.h
nv50_ir_target_nv50.cpp nv50/ir: convert system values to gl_system_value 2023-08-05 00:39:34 +02:00
nv50_ir_target_nv50.h nv50/ir: Remove few nvc0 specific defines from nv50-specific header. 2023-08-16 10:11:45 +00:00
nv50_ir_target_nvc0.cpp nvc0: fix num_gprs for Volta+ 2023-07-20 23:19:58 +00:00
nv50_ir_target_nvc0.h
nv50_ir_util.cpp
nv50_ir_util.h nouveau: Drop BuildUtil::DataArray 2023-07-21 02:40:35 +00:00