Konstantin Seurer e8da8fc5b7 radv: Require an alignment of 64 for accel structs ... Top level acceleration structures need the bottom 6 bits to store the root ids of instances. If we don't require that alignment, more "advanced" allocators like VMA may sub allocate a buffer which can lead to the 6 getting lost. Fixes the Khronos ray tracing Vulkan samples. Closes: #6598 Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16870>		2022-06-06 13:49:24 +00:00
..
addrlib	amd: Initialize Gfx11Lib members in constructor.	2022-05-31 03:36:53 +00:00
ci	radv/ci: update list of failures for Pitcairn	2022-06-02 17:03:59 +02:00
common	include: drop c11_compat.h	2022-06-02 13:09:16 +00:00
compiler	radv,aco: disable shader cache when ACO debug options are used	2022-06-02 14:45:55 +00:00
drm-shim	Use proper types for meson objects	2022-04-18 13:03:08 +03:00
llvm	ac/llvm: Implement uclz.	2022-06-01 17:09:25 +00:00
registers	amd: change chip_class naming to "enum amd_gfx_level gfx_level"	2022-05-13 14:56:22 -04:00
vulkan	radv: Require an alignment of 64 for accel structs	2022-06-06 13:49:24 +00:00
.clang-format	radv: allow holes in inline push constants	2022-04-12 11:44:30 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00