Karol Herbst e65f561a75 ac/llvm: support vec2 on b2i16 ... Since radeonsi sets the alu_to_scalar callback, frontends like Rusticl might end up generating vec2 b2i16. Support this just like it's done for b2f16. Fixes: d692d433f2 ("radeonsi: use nir_lower_alu_to_scalar correctly") Signed-off-by: Karol Herbst <git@karolherbst.de> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23551>		2023-06-10 09:33:19 +00:00
..
addrlib	amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16	2023-06-01 17:59:39 +00:00
ci	amd/ci: add another test to the vkcts-vega10 flake list	2023-06-09 11:38:43 +00:00
common	ac/nir,radv: add 1 dword to ES/GS item size	2023-06-09 02:05:20 +00:00
compiler	aco: Lower divergent bool phis iteratively	2023-06-09 12:39:55 +00:00
drm-shim	amd/drm-shim: add raven2	2023-05-22 20:14:22 +00:00
llvm	ac/llvm: support vec2 on b2i16	2023-06-10 09:33:19 +00:00
registers	ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT	2023-05-24 21:48:19 +00:00
vulkan	radv: disable calibrated timestamps on raven/raven2	2023-06-10 07:02:08 +00:00
meson.build	meson: build radeonsi with aco	2023-05-15 02:01:10 +00:00