Alyssa Rosenzweig e50bae00f4 agx: Add 32-bit bitwise shifts ... Only ishr has an actual native instruction, the others are special cases of the bitfield insertion/extraction ops. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Acked-by: Jason Ekstrand <jason@jlekstrand.net> Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>		2021-05-02 17:41:16 -04:00
..
agx_builder.h.py	agx: Generate builder routines	2021-05-02 17:41:10 -04:00
agx_compile.c	agx: Add 32-bit bitwise shifts	2021-05-02 17:41:16 -04:00
agx_compile.h
agx_compiler.h	agx: Add instruction packing	2021-05-02 17:41:13 -04:00
agx_minifloat.h	agx: Add 8-bit AGX minifloat routines	2021-05-02 17:41:14 -04:00
agx_opcodes.c.py	agx: Generate runtime-accessible opcode table	2021-05-02 17:41:10 -04:00
agx_opcodes.h.py	agx: Generate opcode list	2021-05-02 17:41:09 -04:00
agx_opcodes.py	agx: Add opcode descriptions as Python	2021-05-02 17:41:09 -04:00
agx_pack.c	agx: Add st_vary(_final) instruction packing	2021-05-02 17:41:13 -04:00
agx_print.c	agx: Add instruction printing	2021-05-02 17:41:12 -04:00
agx_register_allocate.c	agx: Add a trivial register allocator	2021-05-02 17:41:12 -04:00
cmdline.c	agx: Add minifloat tests	2021-05-02 17:41:14 -04:00
meson.build	agx: Add instruction packing	2021-05-02 17:41:13 -04:00