Marek Olšák 09e64e3682 nir/opt_shrink_vectors: shrink memory loads, not just IO ... The problem with radeonsi+ACO is that UBO loads from vec4 uniforms using only 1 component always load all 4 components. This fixes that. We are only interested in shrinking UBO and SSBO loads, but I added more intrinsics because why not. Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29384>		2024-09-26 03:01:38 +00:00
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compiler-wrapper-clang++-15.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper-clang++.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper-clang-15.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper-clang.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper-g++.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper-gcc.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
compiler-wrapper.sh	ci: enable shellcheck on whole .gitlab-ci	2023-05-25 16:06:53 +02:00
gitlab-ci.yml	nir/opt_shrink_vectors: shrink memory loads, not just IO	2024-09-26 03:01:38 +00:00