mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-28 07:30:22 +01:00
de367eec07
In4064b5546b, the idea was to have the minimum value as if all stages are active, however hwconfig does not follow that for the tessellation control stage. Ignore min values from hwconfig. Fixes:4064b5546b("intel/dev: reduce warning noise from urb settings"); Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33554>
404 lines
15 KiB
C
404 lines
15 KiB
C
/*
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* Copyright © 2021 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include "intel_device_info.h"
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#include "intel_hwconfig.h"
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#include "intel_hwconfig_types.h"
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#include "intel/common/intel_gem.h"
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#include "i915/intel_device_info.h"
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#include "xe/intel_device_info.h"
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#include "util/log.h"
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struct hwconfig {
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uint32_t key;
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uint32_t len;
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uint32_t val[];
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};
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static char *
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key_to_name(uint32_t key)
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{
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#define HANDLE(key_name) case key_name: return #key_name
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switch (key) {
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HANDLE(INTEL_HWCONFIG_MAX_SLICES_SUPPORTED);
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HANDLE(INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED);
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HANDLE(INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS);
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HANDLE(INTEL_HWCONFIG_NUM_PIXEL_PIPES);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT);
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HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES);
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HANDLE(INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR);
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HANDLE(INTEL_HWCONFIG_MAX_MEMORY_CHANNELS);
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HANDLE(INTEL_HWCONFIG_MEMORY_TYPE);
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HANDLE(INTEL_HWCONFIG_CACHE_TYPES);
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HANDLE(INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB);
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HANDLE(INTEL_HWCONFIG_NUM_THREADS_PER_EU);
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HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS);
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HANDLE(INTEL_HWCONFIG_TOTAL_GS_THREADS);
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HANDLE(INTEL_HWCONFIG_TOTAL_HS_THREADS);
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HANDLE(INTEL_HWCONFIG_TOTAL_DS_THREADS);
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HANDLE(INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS);
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HANDLE(INTEL_HWCONFIG_TOTAL_PS_THREADS);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE);
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HANDLE(INTEL_HWCONFIG_MAX_RCS);
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HANDLE(INTEL_HWCONFIG_MAX_CCS);
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HANDLE(INTEL_HWCONFIG_MAX_VCS);
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HANDLE(INTEL_HWCONFIG_MAX_VECS);
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HANDLE(INTEL_HWCONFIG_MAX_COPY_CS);
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HANDLE(INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB);
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HANDLE(INTEL_HWCONFIG_MIN_VS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_VS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MIN_HS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_HS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MIN_GS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_GS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MIN_DS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_DS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE);
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HANDLE(INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE);
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HANDLE(INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES);
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HANDLE(INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES);
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HANDLE(INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES);
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HANDLE(INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
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HANDLE(INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT);
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HANDLE(INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS);
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HANDLE(INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS);
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HANDLE(INTEL_HWCONFIG_MIN_CS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_MAX_CS_URB_ENTRIES);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER);
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HANDLE(INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW);
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HANDLE(INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS);
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HANDLE(INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT);
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HANDLE(INTEL_HWCONFIG_RESERVED_CCS_WAYS);
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HANDLE(INTEL_HWCONFIG_CSR_SIZE_IN_MB);
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HANDLE(INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE);
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HANDLE(INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB);
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HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_DSS);
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HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE);
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HANDLE(INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS);
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HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB);
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HANDLE(INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB);
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HANDLE(INTEL_HWCONFIG_MAX_SUBSLICE);
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HANDLE(INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE);
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HANDLE(INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB);
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HANDLE(INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB);
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#undef HANDLE
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}
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return "UNKNOWN_INTEL_HWCONFIG";
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}
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typedef void (*hwconfig_item_cb)(struct intel_device_info *devinfo,
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const struct hwconfig *item);
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static void
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process_hwconfig_table(struct intel_device_info *devinfo,
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const struct hwconfig *hwconfig,
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int32_t hwconfig_len,
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hwconfig_item_cb item_callback_func)
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{
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assert(hwconfig);
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assert(hwconfig_len % 4 == 0);
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const struct hwconfig *current = hwconfig;
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const struct hwconfig *end =
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(struct hwconfig*)(((uint32_t*)hwconfig) + (hwconfig_len / 4));
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while (current < end) {
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assert(current + 1 < end);
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struct hwconfig *next =
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(struct hwconfig*)((uint32_t*)current + 2 + current->len);
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assert(next <= end);
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item_callback_func(devinfo, current);
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current = next;
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}
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assert(current == end);
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}
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bool
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intel_hwconfig_is_required(const struct intel_device_info *devinfo)
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{
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/* returns is true when the platform should apply hwconfig values */
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return devinfo->verx10 >= 125;
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}
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static inline void
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hwconfig_item_warning(const char *devinfo_name, uint32_t devinfo_val,
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const uint32_t hwconfig_key, uint32_t hwconfig_val)
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{
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#ifndef NDEBUG
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if (devinfo_val != hwconfig_val) {
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mesa_logw("%s (%u) != devinfo->%s (%u)",
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key_to_name(hwconfig_key), hwconfig_val, devinfo_name,
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devinfo_val);
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}
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#endif
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}
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static inline bool
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should_apply_hwconfig_item(uint16_t always_apply_verx10,
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const struct intel_device_info *devinfo,
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uint32_t devinfo_val)
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{
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assert(intel_hwconfig_is_required(devinfo));
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if ((devinfo->verx10 >= always_apply_verx10 || devinfo_val == 0))
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return true;
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return false;
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}
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/* If apply_hwconfig(devinfo) is true, then we apply the
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* hwconfig value to the devinfo field, ``F``.
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*
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* For debug builds, if apply_hwconfig() is false, we will compare the
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* hwconfig value, ``V``, with the current value in ``F`` and log a warning
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* message if they differ. This should help to make sure the values in our
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* devinfo structures match what hwconfig is specified.
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*
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* If ``devinfo->verx10 >= CVER``, then the hwconfig value is always be used.
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* If ``devinfo->verx10 < CVER``, the hwconfig value is only used if
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* devinfo->F is 0.
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*/
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#define DEVINFO_HWCONFIG_KV(CVER, F, K, V) \
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do { \
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if (check_only) \
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hwconfig_item_warning(#F, devinfo->F, (K), (V)); \
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else if (should_apply_hwconfig_item((CVER), devinfo, devinfo->F)) \
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devinfo->F = (V); \
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} while (0)
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#define DEVINFO_HWCONFIG(CVER, F, I) \
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DEVINFO_HWCONFIG_KV((CVER), F, (I)->key, (I)->val[0])
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static void
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process_hwconfig_item(struct intel_device_info *devinfo,
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const struct hwconfig *item,
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const bool check_only)
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{
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switch (item->key) {
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case INTEL_HWCONFIG_MAX_SLICES_SUPPORTED:
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case INTEL_HWCONFIG_MAX_DUAL_SUBSLICES_SUPPORTED:
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case INTEL_HWCONFIG_NUM_PIXEL_PIPES:
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case INTEL_HWCONFIG_DEPRECATED_MAX_NUM_GEOMETRY_PIPES:
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case INTEL_HWCONFIG_DEPRECATED_L3_CACHE_SIZE_IN_KB:
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case INTEL_HWCONFIG_DEPRECATED_L3_BANK_COUNT:
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case INTEL_HWCONFIG_L3_CACHE_WAYS_SIZE_IN_BYTES:
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case INTEL_HWCONFIG_L3_CACHE_WAYS_PER_SECTOR:
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case INTEL_HWCONFIG_MAX_MEMORY_CHANNELS:
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case INTEL_HWCONFIG_MEMORY_TYPE:
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case INTEL_HWCONFIG_CACHE_TYPES:
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case INTEL_HWCONFIG_LOCAL_MEMORY_PAGE_SIZES_SUPPORTED:
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case INTEL_HWCONFIG_DEPRECATED_SLM_SIZE_IN_KB:
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break; /* ignore */
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case INTEL_HWCONFIG_MAX_NUM_EU_PER_DSS:
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DEVINFO_HWCONFIG(125, max_eus_per_subslice, item);
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break;
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case INTEL_HWCONFIG_NUM_THREADS_PER_EU:
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DEVINFO_HWCONFIG(125, num_thread_per_eu, item);
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break;
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case INTEL_HWCONFIG_TOTAL_VS_THREADS:
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DEVINFO_HWCONFIG(125, max_vs_threads, item);
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break;
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case INTEL_HWCONFIG_TOTAL_GS_THREADS:
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DEVINFO_HWCONFIG(125, max_gs_threads, item);
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break;
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case INTEL_HWCONFIG_TOTAL_HS_THREADS:
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DEVINFO_HWCONFIG(125, max_tcs_threads, item);
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break;
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case INTEL_HWCONFIG_TOTAL_DS_THREADS:
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DEVINFO_HWCONFIG(125, max_tes_threads, item);
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break;
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case INTEL_HWCONFIG_TOTAL_VS_THREADS_POCS:
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break; /* ignore */
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case INTEL_HWCONFIG_TOTAL_PS_THREADS: {
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unsigned threads = item->val[0];
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if (devinfo->ver == 12)
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threads /= 2;
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DEVINFO_HWCONFIG_KV(125, max_threads_per_psd, item->key, threads);
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break;
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}
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case INTEL_HWCONFIG_URB_SIZE_PER_SLICE_IN_KB:
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DEVINFO_HWCONFIG(125, urb.size, item);
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break;
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case INTEL_HWCONFIG_DEPRECATED_MAX_FILL_RATE:
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case INTEL_HWCONFIG_MAX_RCS:
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case INTEL_HWCONFIG_MAX_CCS:
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case INTEL_HWCONFIG_MAX_VCS:
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case INTEL_HWCONFIG_MAX_VECS:
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case INTEL_HWCONFIG_MAX_COPY_CS:
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case INTEL_HWCONFIG_DEPRECATED_URB_SIZE_IN_KB:
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break; /* ignore */
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case INTEL_HWCONFIG_MAX_VS_URB_ENTRIES:
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DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_VERTEX], item);
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break;
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case INTEL_HWCONFIG_MIN_PCS_URB_ENTRIES:
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case INTEL_HWCONFIG_MAX_PCS_URB_ENTRIES:
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break; /* ignore */
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case INTEL_HWCONFIG_MAX_HS_URB_ENTRIES:
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DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_CTRL], item);
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break;
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case INTEL_HWCONFIG_MAX_GS_URB_ENTRIES:
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DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_GEOMETRY], item);
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break;
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case INTEL_HWCONFIG_MAX_DS_URB_ENTRIES:
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DEVINFO_HWCONFIG(200, urb.max_entries[MESA_SHADER_TESS_EVAL], item);
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break;
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case INTEL_HWCONFIG_MIN_VS_URB_ENTRIES:
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case INTEL_HWCONFIG_MIN_HS_URB_ENTRIES:
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case INTEL_HWCONFIG_MIN_GS_URB_ENTRIES:
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case INTEL_HWCONFIG_MIN_DS_URB_ENTRIES:
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case INTEL_HWCONFIG_PUSH_CONSTANT_URB_RESERVED_SIZE:
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case INTEL_HWCONFIG_POCS_PUSH_CONSTANT_URB_RESERVED_SIZE:
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case INTEL_HWCONFIG_URB_REGION_ALIGNMENT_SIZE_IN_BYTES:
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case INTEL_HWCONFIG_URB_ALLOCATION_SIZE_UNITS_IN_BYTES:
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case INTEL_HWCONFIG_MAX_URB_SIZE_CCS_IN_BYTES:
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case INTEL_HWCONFIG_VS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
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case INTEL_HWCONFIG_DS_MIN_DEREF_BLOCK_SIZE_HANDLE_COUNT:
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case INTEL_HWCONFIG_NUM_RT_STACKS_PER_DSS:
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case INTEL_HWCONFIG_MAX_URB_STARTING_ADDRESS:
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case INTEL_HWCONFIG_MIN_CS_URB_ENTRIES:
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case INTEL_HWCONFIG_MAX_CS_URB_ENTRIES:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_URB:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_REST:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_DC:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RO:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_Z:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COLOR:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_UNIFIED_TILE_CACHE:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_COMMAND_BUFFER:
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case INTEL_HWCONFIG_L3_ALLOC_PER_BANK_RW:
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case INTEL_HWCONFIG_MAX_NUM_L3_CONFIGS:
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case INTEL_HWCONFIG_BINDLESS_SURFACE_OFFSET_BIT_COUNT:
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case INTEL_HWCONFIG_RESERVED_CCS_WAYS:
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case INTEL_HWCONFIG_CSR_SIZE_IN_MB:
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case INTEL_HWCONFIG_GEOMETRY_PIPES_PER_SLICE:
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case INTEL_HWCONFIG_L3_BANK_SIZE_IN_KB:
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case INTEL_HWCONFIG_SLM_SIZE_PER_DSS:
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case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_SLICE:
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case INTEL_HWCONFIG_MAX_PIXEL_FILL_RATE_PER_DSS:
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case INTEL_HWCONFIG_URB_SIZE_PER_L3_BANK_COUNT_IN_KB:
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case INTEL_HWCONFIG_MAX_SUBSLICE:
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case INTEL_HWCONFIG_MAX_EU_PER_SUBSLICE:
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case INTEL_HWCONFIG_RAMBO_L3_BANK_SIZE_IN_KB:
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case INTEL_HWCONFIG_SLM_SIZE_PER_SS_IN_KB:
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default:
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break; /* ignore */
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}
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}
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static void
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apply_hwconfig_item(struct intel_device_info *devinfo,
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const struct hwconfig *item)
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{
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process_hwconfig_item(devinfo, item, false);
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}
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bool
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intel_hwconfig_process_table(struct intel_device_info *devinfo,
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void *data, int32_t len)
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{
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if (intel_hwconfig_is_required(devinfo))
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process_hwconfig_table(devinfo, data, len, apply_hwconfig_item);
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return true;
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}
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static void
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print_hwconfig_item(struct intel_device_info *devinfo,
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const struct hwconfig *item)
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{
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printf("%s: ", key_to_name(item->key));
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for (int i = 0; i < item->len; i++)
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printf(i ? ", 0x%x (%d)" : "0x%x (%d)", item->val[i],
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item->val[i]);
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printf("\n");
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}
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static void
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intel_print_hwconfig_table(const struct hwconfig *hwconfig,
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int32_t hwconfig_len)
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{
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process_hwconfig_table(NULL, hwconfig, hwconfig_len, print_hwconfig_item);
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}
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static struct hwconfig *
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intel_get_hwconfig_table(int fd, struct intel_device_info *devinfo,
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int32_t *hwconfig_len)
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{
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switch (devinfo->kmd_type) {
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case INTEL_KMD_TYPE_I915:
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return intel_device_info_i915_query_hwconfig(fd, hwconfig_len);
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case INTEL_KMD_TYPE_XE:
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return intel_device_info_xe_query_hwconfig(fd, hwconfig_len);
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default:
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unreachable("unknown kmd type");
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return NULL;
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}
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}
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void
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intel_get_and_print_hwconfig_table(int fd, struct intel_device_info *devinfo)
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{
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struct hwconfig *hwconfig;
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int32_t hwconfig_len = 0;
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hwconfig = intel_get_hwconfig_table(fd, devinfo, &hwconfig_len);
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if (hwconfig) {
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intel_print_hwconfig_table(hwconfig, hwconfig_len);
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free(hwconfig);
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}
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}
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UNUSED static void
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check_hwconfig_item(struct intel_device_info *devinfo,
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const struct hwconfig *item)
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{
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process_hwconfig_item(devinfo, item, true);
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}
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void
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intel_check_hwconfig_items(int fd, struct intel_device_info *devinfo)
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{
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#ifndef NDEBUG
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struct hwconfig *data;
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int32_t len = 0;
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data = intel_get_hwconfig_table(fd, devinfo, &len);
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if (data) {
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process_hwconfig_table(devinfo, data, len, check_hwconfig_item);
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free(data);
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}
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#endif
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}
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