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39afffe956
we want some enum values on device for NIR->CL bindings. specifically, src_type/dest_type indices. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32208>
61 lines
1.7 KiB
C
61 lines
1.7 KiB
C
/*
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* Copyright © 2014 Connor Abbott
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* SPDX-License-Identifier: MIT
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*/
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/*
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* This file is split off from nir.h to allow #include'ing these defines from
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* OpenCL code.
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*/
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#ifndef NIR_DEFINES_H
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#define NIR_DEFINES_H
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/** NIR sized and unsized types
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*
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* The values in this enum are carefully chosen so that the sized type is
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* just the unsized type OR the number of bits.
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*/
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/* clang-format off */
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typedef enum ENUM_PACKED {
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nir_type_invalid = 0, /* Not a valid type */
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nir_type_int = 2,
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nir_type_uint = 4,
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nir_type_bool = 6,
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nir_type_float = 128,
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nir_type_bool1 = 1 | nir_type_bool,
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nir_type_bool8 = 8 | nir_type_bool,
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nir_type_bool16 = 16 | nir_type_bool,
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nir_type_bool32 = 32 | nir_type_bool,
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nir_type_int1 = 1 | nir_type_int,
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nir_type_int8 = 8 | nir_type_int,
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nir_type_int16 = 16 | nir_type_int,
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nir_type_int32 = 32 | nir_type_int,
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nir_type_int64 = 64 | nir_type_int,
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nir_type_uint1 = 1 | nir_type_uint,
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nir_type_uint8 = 8 | nir_type_uint,
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nir_type_uint16 = 16 | nir_type_uint,
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nir_type_uint32 = 32 | nir_type_uint,
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nir_type_uint64 = 64 | nir_type_uint,
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nir_type_float16 = 16 | nir_type_float,
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nir_type_float32 = 32 | nir_type_float,
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nir_type_float64 = 64 | nir_type_float,
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} nir_alu_type;
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/* clang-format on */
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#define NIR_ALU_TYPE_SIZE_MASK 0x79
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#define NIR_ALU_TYPE_BASE_TYPE_MASK 0x86
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static inline unsigned
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nir_alu_type_get_type_size(nir_alu_type type)
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{
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return type & NIR_ALU_TYPE_SIZE_MASK;
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}
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static inline nir_alu_type
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nir_alu_type_get_base_type(nir_alu_type type)
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{
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return (nir_alu_type)(type & NIR_ALU_TYPE_BASE_TYPE_MASK);
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}
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#endif
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