mesa/src/amd
Rhys Perry da74e0f012 aco: rewrite print_reg_class()
Make it work for any regclass, and print linear VGPRs differently from
logical ones.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12172>
2021-09-17 14:36:03 +00:00
..
addrlib amd/addrlib: expose CMASK address equations to drivers on GFX10+ 2021-08-05 06:37:09 +00:00
ci radv/ci: add a list of expected failures for VanGogh 2021-09-15 18:20:07 +02:00
common ac/rgp, radv: report wave size for shaders 2021-09-17 08:05:36 +00:00
compiler aco: rewrite print_reg_class() 2021-09-17 14:36:03 +00:00
llvm ac/llvm: implement nir_intrinsic_global_atomic_{fmin,fmax} 2021-09-15 14:10:42 +00:00
registers python: drop python2 support 2021-08-14 21:44:32 +00:00
vulkan radv: fix pipeline caching with robust buffer access 2021-09-17 13:49:46 +00:00
.clang-format radv: Add clang-format for AMD code. 2021-04-10 03:31:32 +02:00
meson.build aco: add framework for unit testing 2020-07-30 16:13:08 +00:00