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mesa/src/amd
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Samuel Pitoiset da49fee80f radv: introduce radv_graphics_pipeline_info and split existing info structs 
I should have introduced radv_graphics_pipeline_info earlier. More
states will be added later.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16643>
2022-05-23 10:33:08 +00:00
..
addrlib amd: rename fishes to Navi21, Navi22, Navi23, Navi24, and Rembrandt 2022-05-19 11:55:50 +00:00
ci amd: rename fishes to Navi21, Navi22, Navi23, Navi24, and Rembrandt 2022-05-19 11:55:50 +00:00
common radv: add missing NIR_PASS() and switch from NIR_PASS_V() 2022-05-19 13:37:20 +00:00
compiler radv: export implicit primitive ID in NIR for legacy VS or TES 2022-05-20 14:55:05 +00:00
drm-shim Use proper types for meson objects 2022-04-18 13:03:08 +03:00
llvm radv: export implicit primitive ID in NIR for legacy VS or TES 2022-05-20 14:55:05 +00:00
registers amd: change chip_class naming to "enum amd_gfx_level gfx_level" 2022-05-13 14:56:22 -04:00
vulkan radv: introduce radv_graphics_pipeline_info and split existing info structs 2022-05-23 10:33:08 +00:00
.clang-format radv: allow holes in inline push constants 2022-04-12 11:44:30 +00:00
meson.build r300/r600: Add drm-shim support. 2022-02-02 00:59:08 +00:00