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0c4e1c9efc
The recommended settings is just a guidance and not a programming requirement as per the Bspec. Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35904>
20 lines
729 B
C
20 lines
729 B
C
/*
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* Copyright 2024 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#pragma once
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#include "dev/intel_device_info.h"
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void intel_common_update_device_info(int fd, struct intel_device_info *devinfo);
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void
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intel_compute_engine_async_threads_limit(const struct intel_device_info *devinfo,
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uint32_t hw_threads_in_wg, bool slm_or_barrier_enabled,
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uint8_t *ret_pixel_async_compute_thread_limit,
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uint8_t *ret_z_pass_async_compute_thread_limit,
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uint8_t *ret_np_z_async_throttle_settings);
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int
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intel_compute_threads_group_dispatch_size(uint32_t hw_threads_in_wg);
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