Kristian Høgsberg d9e29f5d88 i965: Add SIMD8 URB write low-level IR instruction ... This is all we need from the generator for SIMD8 vertex shaders. This opcode is just the send instruction, all the hard work will happen in the visitor using LOAD_PAYLOAD. Signed-off-by: Kristian Høgsberg <krh@bitplanet.net> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>		2014-12-10 12:29:00 -08:00
..
egl	Use calloc instead of malloc/memset-0	2014-12-08 17:02:19 -08:00
gallium	gallium/target: Haiku softpipe	2014-12-10 14:01:01 +00:00
gbm	dri/kms: Always zero out struct drm_mode_create_dumb	2014-11-16 01:03:40 +00:00
getopt
glsl	glsl: invariant qualifier is not valid for shader inputs in GLSL ES 3.00	2014-12-09 11:40:00 +01:00
glx	glx/dri3: Implement LIBGL_SHOW_FPS=1 for DRI3/Present.	2014-10-29 15:13:58 -07:00
gtest
hgl	hgl: traverse add-on entries	2014-12-10 14:01:01 +00:00
loader	loader: Add missing EXPAT_CFLAGS to libloader.la CPPFLAGS	2014-12-08 08:50:27 -08:00
mapi	glapi: Remove dead mesadef.py.	2014-11-26 20:31:15 +00:00
mesa	i965: Add SIMD8 URB write low-level IR instruction	2014-12-10 12:29:00 -08:00
util	ra: Don't use regs as the ralloc context.	2014-12-01 11:32:54 -08:00
Makefile.am	automake: handle gallium SUBDIRs in gallium/Makefile	2014-08-13 00:46:54 +01:00
SConscript	util: Move ralloc to a new src/util directory.	2014-08-04 11:06:58 -07:00