mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-30 13:40:23 +01:00
d832209a78
When dispatching compute shaders to do a blit, our destination rectangle may not line up perfectly with the workgroup size. For example, we may round the left x0 coordinate down to a multiple of the workgroup width, and the right x1 coordinate up to the next multiple of the workgroup width. Similarly for y0/y1 and workgroup height. This means that we may dispatch additional invocations which should not actually do any blitting. We need to set key->uses_kill to bounds check and drop those. Caught by Piglit's arb_copy_image-simple when forcing iris to perform resource_copy_region via BLOCS and running with INTEL_DEBUG=norbc on Icelake. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13524> |
||
|---|---|---|
| .. | ||
| blorp | ||
| common | ||
| compiler | ||
| dev | ||
| ds | ||
| genxml | ||
| isl | ||
| nullhw-layer | ||
| perf | ||
| tools | ||
| vulkan | ||
| Makefile.perf.am | ||
| meson.build | ||