Ian Romanick d6d63aec18 nir/algebraic: optimize ior(ine(a, 0), ine(b, 0)) to ine(ior(a, b), 0) ... Like 70f9e2589e. Also scrub the unnecessary size qualifier in both replacement patterns. This occurs in a handful of places in the soft-fp64 code, and that is the primary reason for the change. Perhaps the patterns that generate umin should be conditioned on something, but I'm not sure what. lower_bitops might cover the cases that matter, but it seems ugly. Results on the 308 shaders extracted from the fp64 portion of the OpenGL CTS: Tiger Lake and Ice Lake had similar results. (Tiger Lake shown) total instructions in shared programs: 936505 -> 933388 (-0.33%) instructions in affected programs: 925719 -> 922602 (-0.34%) helped: 154 HURT: 1 helped stats (abs) min: 1 max: 211 x̄: 35.45 x̃: 16 helped stats (rel) min: 0.34% max: 9.30% x̄: 2.28% x̃: 0.96% HURT stats (abs) min: 2342 max: 2342 x̄: 2342.00 x̃: 2342 HURT stats (rel) min: 2.28% max: 2.28% x̄: 2.28% x̃: 2.28% 95% mean confidence interval for instructions value: -51.21 10.99 95% mean confidence interval for instructions %-change: -2.61% -1.89% Inconclusive result (value mean confidence interval includes 0). total cycles in shared programs: 7323502 -> 7306184 (-0.24%) cycles in affected programs: 7220376 -> 7203058 (-0.24%) helped: 126 HURT: 1 helped stats (abs) min: 2 max: 946 x̄: 159.10 x̃: 95 helped stats (rel) min: 0.01% max: 9.62% x̄: 0.80% x̃: 0.37% HURT stats (abs) min: 2728 max: 2728 x̄: 2728.00 x̃: 2728 HURT stats (rel) min: 0.37% max: 0.37% x̄: 0.37% x̃: 0.37% 95% mean confidence interval for cycles value: -192.07 -80.66 95% mean confidence interval for cycles %-change: -1.07% -0.51% Cycles are helped. total spills in shared programs: 635 -> 817 (28.66%) spills in affected programs: 635 -> 817 (28.66%) helped: 0 HURT: 3 total fills in shared programs: 2065 -> 2438 (18.06%) fills in affected programs: 2019 -> 2392 (18.47%) helped: 0 HURT: 2 Regular shader-db results: All Haswell+ platforms had similar results. (Tiger Lake shown) total instructions in shared programs: 17611506 -> 17611489 (<.01%) instructions in affected programs: 33442 -> 33425 (-0.05%) helped: 32 HURT: 6 helped stats (abs) min: 1 max: 6 x̄: 1.69 x̃: 1 helped stats (rel) min: 0.08% max: 1.90% x̄: 0.27% x̃: 0.11% HURT stats (abs) min: 1 max: 15 x̄: 6.17 x̃: 5 HURT stats (rel) min: 0.09% max: 1.50% x̄: 0.65% x̃: 0.55% 95% mean confidence interval for instructions value: -1.70 0.80 95% mean confidence interval for instructions %-change: -0.30% 0.05% Inconclusive result (value mean confidence interval includes 0). total cycles in shared programs: 338419218 -> 338418502 (<.01%) cycles in affected programs: 385795 -> 385079 (-0.19%) helped: 42 HURT: 3 helped stats (abs) min: 2 max: 192 x̄: 24.57 x̃: 16 helped stats (rel) min: 0.04% max: 2.09% x̄: 0.33% x̃: 0.22% HURT stats (abs) min: 64 max: 164 x̄: 105.33 x̃: 88 HURT stats (rel) min: 0.77% max: 1.58% x̄: 1.09% x̃: 0.93% 95% mean confidence interval for cycles value: -29.76 -2.06 95% mean confidence interval for cycles %-change: -0.40% -0.07% Cycles are helped. Ivy Bridge and Sandy Bridge had similar results. (Ivy Bridge shown) total instructions in shared programs: 11875620 -> 11875617 (<.01%) instructions in affected programs: 421 -> 418 (-0.71%) helped: 2 HURT: 0 total cycles in shared programs: 178245336 -> 178245326 (<.01%) cycles in affected programs: 3425 -> 3415 (-0.29%) helped: 2 HURT: 0 No changes on Gen4 or Gen5. Reviewed-by: Matt Turner <mattst88@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4142>		2020-03-18 20:36:29 +00:00
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amd	radv: fix random depth range unrestricted failures due to a cache issue	2020-03-18 11:36:24 +00:00
broadcom	util/ra: spiff out select_reg_callback	2020-03-10 16:01:39 +00:00
compiler	nir/algebraic: optimize ior(ine(a, 0), ine(b, 0)) to ine(ior(a, b), 0)	2020-03-18 20:36:29 +00:00
drm-shim	drm-shim: fix EOF case	2019-11-13 12:39:14 +00:00
egl	egl/android: set window usage flags	2020-03-12 11:03:32 +09:00
etnaviv	etnaviv: drm-shim: add GC400	2020-01-30 04:05:39 +00:00
freedreno	turnip: Do gathering xfb info after nir_remove_dead_variables	2020-03-18 09:47:04 +00:00
gallium	lima: decode depth/stencil write bits in RSW	2020-03-18 08:36:17 +00:00
gbm	meson: move the generic symbols check arguments to a common variable	2019-11-05 20:30:47 +00:00
getopt	meson: build getopt when using msvc	2019-09-10 20:36:47 +00:00
glx	Revert "glx: convert glx_config_create_list to one big calloc"	2020-03-04 10:19:48 +00:00
gtest	meson: gtest needs pthreads	2019-11-07 06:11:19 -08:00
hgl	haiku: fix Mesa build	2019-10-01 10:31:02 +00:00
imgui	meson: drop intel_ prefix on imgui_core	2019-12-10 15:16:02 +00:00
intel	anv: Use isl_drm_modifier_get_default_aux_state()	2020-03-18 11:39:33 -07:00
loader	loader: Fix leak of kernel driver name	2020-01-30 10:08:17 -08:00
mapi	glthread: fall back if a param size is non-zero and a pointer param is NULL	2020-03-06 01:06:14 +00:00
mesa	st/mesa: disallow deferred flush if there are multiple contexts	2020-03-18 20:01:57 +00:00
panfrost	pan/bi: Interpret register allocation results	2020-03-12 12:41:08 +00:00
util	glsl/tests: Fix waiting for disk_cache_put() to finish.	2020-03-12 19:47:23 +00:00
vulkan	vulkan/wsi: fix cleanup when dup() fails	2020-03-10 22:43:25 +00:00
meson.build	meson: only build imgui when needed	2019-11-25 07:51:56 +00:00
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