mesa/src/intel/common/i915
Sushma Venkatesh Reddy d52dd5a9e9 anv/drirc: add option to provide low latency hint
GuC offers a mechanism for KMD/UMD to provide workload hints and one of
that strategy is low latency hint. We can utilize this hint when the
workload is more latency sensitive like compute usecases.

Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28282>
2024-06-28 21:45:59 +00:00
..
intel_defines.h intel: Move intel_define.h to i915/intel_define.h 2024-02-21 18:10:54 +00:00
intel_engine.c intel/common: Implement i915_engines_is_guc_semaphore_functional() 2024-02-14 17:29:54 +00:00
intel_engine.h intel/common: Add intel_engines_supported_count() 2024-02-14 17:29:54 +00:00
intel_gem.c anv/drirc: add option to provide low latency hint 2024-06-28 21:45:59 +00:00
intel_gem.h intel: Pass virtual memory address space ID while creating context 2023-09-07 06:39:06 +00:00