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we don't usually need a multi-instruction lowering. with the agx change in the next commit, honeykrisp results: Totals from 3589 (6.64% of 54019) affected shaders: MaxWaves: 3598144 -> 3598400 (+0.01%); split: +0.02%, -0.01% Instrs: 1445830 -> 1332394 (-7.85%) CodeSize: 10696356 -> 9742130 (-8.92%) Fills: 721 -> 723 (+0.28%); split: -0.14%, +0.42% Scratch: 3980 -> 3968 (-0.30%) ALU: 1156426 -> 1043198 (-9.79%) FSCIB: 1156426 -> 1043196 (-9.79%) IC: 267202 -> 267166 (-0.01%) GPRs: 208765 -> 208712 (-0.03%); split: -0.16%, +0.14% Uniforms: 683643 -> 683677 (+0.00%); split: -0.01%, +0.01% Preamble instrs: 1163325 -> 1159314 (-0.34%) control results alone: Totals: Instrs: 110168 -> 107171 (-2.72%) Totals from 71 (22.26% of 319) affected shaders: Instrs: 48895 -> 45898 (-6.13%) Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Marek Olšák <maraeo@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35989>
273 lines
10 KiB
C
273 lines
10 KiB
C
/*
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* Copyright © 2010 Intel Corporation
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* Copyright © 2018 Broadcom
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/** nir_lower_alu.c
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*
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* NIR's home for miscellaneous ALU operation lowering implementations.
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*
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* Most NIR ALU lowering occurs in nir_opt_algebraic.py, since it's generally
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* easy to write them there. However, if terms appear multiple times in the
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* lowered code, it can get very verbose and cause a lot of work for CSE, so
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* it may end up being easier to write out in C code.
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*
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* The shader must be in SSA for this pass.
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*/
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static bool
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lower_alu_instr(nir_builder *b, nir_alu_instr *instr, UNUSED void *cb_data)
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{
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nir_def *lowered = NULL;
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b->cursor = nir_before_instr(&instr->instr);
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b->exact = instr->exact;
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b->fp_fast_math = instr->fp_fast_math;
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switch (instr->op) {
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case nir_op_bitfield_reverse:
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if (b->shader->options->lower_bitfield_reverse) {
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assert(instr->def.bit_size == 32);
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/* For more details, see:
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*
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* http://graphics.stanford.edu/~seander/bithacks.html#ReverseParallel
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*/
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nir_def *c1 = nir_imm_int(b, 1);
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nir_def *c2 = nir_imm_int(b, 2);
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nir_def *c4 = nir_imm_int(b, 4);
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nir_def *c8 = nir_imm_int(b, 8);
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nir_def *c16 = nir_imm_int(b, 16);
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nir_def *c33333333 = nir_imm_int(b, 0x33333333);
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nir_def *c55555555 = nir_imm_int(b, 0x55555555);
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nir_def *c0f0f0f0f = nir_imm_int(b, 0x0f0f0f0f);
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nir_def *c00ff00ff = nir_imm_int(b, 0x00ff00ff);
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lowered = nir_ssa_for_alu_src(b, instr, 0);
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/* Swap odd and even bits. */
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lowered = nir_ior(b,
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nir_iand(b, nir_ushr(b, lowered, c1), c55555555),
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nir_ishl(b, nir_iand(b, lowered, c55555555), c1));
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/* Swap consecutive pairs. */
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lowered = nir_ior(b,
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nir_iand(b, nir_ushr(b, lowered, c2), c33333333),
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nir_ishl(b, nir_iand(b, lowered, c33333333), c2));
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/* Swap nibbles. */
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lowered = nir_ior(b,
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nir_iand(b, nir_ushr(b, lowered, c4), c0f0f0f0f),
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nir_ishl(b, nir_iand(b, lowered, c0f0f0f0f), c4));
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/* Swap bytes. */
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lowered = nir_ior(b,
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nir_iand(b, nir_ushr(b, lowered, c8), c00ff00ff),
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nir_ishl(b, nir_iand(b, lowered, c00ff00ff), c8));
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lowered = nir_ior(b,
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nir_ushr(b, lowered, c16),
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nir_ishl(b, lowered, c16));
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}
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break;
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case nir_op_bit_count:
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if (b->shader->options->lower_bit_count) {
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/* For more details, see:
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*
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* http://graphics.stanford.edu/~seander/bithacks.html#CountBitsSetParallel
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*/
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lowered = nir_ssa_for_alu_src(b, instr, 0);
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unsigned bit_size = lowered->bit_size;
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lowered = nir_isub(b, lowered,
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nir_iand_imm(b, nir_ushr_imm(b, lowered, 1), 0x55555555));
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lowered = nir_iadd(b, nir_iand_imm(b, lowered, 0x33333333),
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nir_iand_imm(b, nir_ushr_imm(b, lowered, 2), 0x33333333));
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lowered = nir_iadd(b, lowered, nir_ushr_imm(b, lowered, 4));
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lowered = nir_iand_imm(b, lowered, 0x0f0f0f0f);
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lowered = nir_imul_imm(b, lowered, 0x01010101);
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lowered = nir_u2u32(b, nir_ushr_imm(b, lowered, bit_size - 8));
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}
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break;
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case nir_op_imul_high:
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case nir_op_umul_high:
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if (b->shader->options->lower_mul_high) {
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nir_def *src0 = nir_ssa_for_alu_src(b, instr, 0);
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nir_def *src1 = nir_ssa_for_alu_src(b, instr, 1);
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if (src0->bit_size < 32) {
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/* Just do the math in 32-bit space and shift the result */
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nir_alu_type base_type = nir_op_infos[instr->op].output_type;
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nir_def *src0_32 = nir_type_convert(b, src0, base_type, base_type | 32, nir_rounding_mode_undef);
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nir_def *src1_32 = nir_type_convert(b, src1, base_type, base_type | 32, nir_rounding_mode_undef);
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nir_def *dest_32 = nir_imul(b, src0_32, src1_32);
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nir_def *dest_shifted = nir_ishr_imm(b, dest_32, src0->bit_size);
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lowered = nir_type_convert(b, dest_shifted, base_type, base_type | src0->bit_size, nir_rounding_mode_undef);
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} else {
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nir_def *cshift = nir_imm_int(b, src0->bit_size / 2);
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nir_def *cmask = nir_imm_intN_t(b, (1ull << (src0->bit_size / 2)) - 1, src0->bit_size);
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nir_def *different_signs = NULL;
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if (instr->op == nir_op_imul_high) {
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nir_def *c0 = nir_imm_intN_t(b, 0, src0->bit_size);
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different_signs = nir_ixor(b,
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nir_ilt(b, src0, c0),
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nir_ilt(b, src1, c0));
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src0 = nir_iabs(b, src0);
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src1 = nir_iabs(b, src1);
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}
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/* ABCD
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* * EFGH
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* ======
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* (GH * CD) + (GH * AB) << 16 + (EF * CD) << 16 + (EF * AB) << 32
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*
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* Start by splitting into the 4 multiplies.
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*/
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nir_def *src0l = nir_iand(b, src0, cmask);
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nir_def *src1l = nir_iand(b, src1, cmask);
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nir_def *src0h = nir_ushr(b, src0, cshift);
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nir_def *src1h = nir_ushr(b, src1, cshift);
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nir_def *lo = nir_imul(b, src0l, src1l);
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nir_def *m1 = nir_imul(b, src0l, src1h);
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nir_def *m2 = nir_imul(b, src0h, src1l);
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nir_def *hi = nir_imul(b, src0h, src1h);
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nir_def *tmp;
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tmp = nir_ishl(b, m1, cshift);
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hi = nir_iadd(b, hi, nir_uadd_carry(b, lo, tmp));
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lo = nir_iadd(b, lo, tmp);
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hi = nir_iadd(b, hi, nir_ushr(b, m1, cshift));
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tmp = nir_ishl(b, m2, cshift);
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hi = nir_iadd(b, hi, nir_uadd_carry(b, lo, tmp));
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lo = nir_iadd(b, lo, tmp);
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hi = nir_iadd(b, hi, nir_ushr(b, m2, cshift));
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if (instr->op == nir_op_imul_high) {
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/* For channels where different_signs is set we have to perform a
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* 64-bit negation. This is *not* the same as just negating the
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* high 32-bits. Consider -3 * 2. The high 32-bits is 0, but the
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* desired result is -1, not -0! Recall -x == ~x + 1.
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*/
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nir_def *c1 = nir_imm_intN_t(b, 1, src0->bit_size);
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hi = nir_bcsel(b, different_signs,
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nir_iadd(b,
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nir_inot(b, hi),
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nir_uadd_carry(b, nir_inot(b, lo), c1)),
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hi);
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}
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lowered = hi;
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}
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}
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break;
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case nir_op_fmin:
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case nir_op_fmax: {
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if (!b->shader->options->lower_fminmax_signed_zero ||
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!nir_alu_instr_is_signed_zero_preserve(instr))
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break;
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nir_def *s0 = nir_ssa_for_alu_src(b, instr, 0);
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nir_def *s1 = nir_ssa_for_alu_src(b, instr, 1);
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bool max = instr->op == nir_op_fmax;
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/* Lower the fmin/fmax to a no_signed_zero fmin/fmax. This ensures that
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* nir_lower_alu is idempotent, and allows the backend to implement
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* soundly the no_signed_zero subset of fmin/fmax.
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*/
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b->fp_fast_math &= ~FLOAT_CONTROLS_SIGNED_ZERO_PRESERVE;
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nir_def *fminmax = max ? nir_fmax(b, s0, s1) : nir_fmin(b, s0, s1);
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b->fp_fast_math = instr->fp_fast_math;
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/* If we have a constant source, we can usually optimize */
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if (s0->num_components == 1 && s0->bit_size == 32) {
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for (unsigned i = 0; i < 2 && lowered == NULL; ++i) {
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if (!nir_src_is_const(instr->src[i].src))
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continue;
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uint32_t x = nir_alu_src_as_uint(instr->src[i]);
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bool pos_zero = x == fui(+0.0);
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bool neg_zero = x == fui(-0.0);
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nir_def *zero = i == 0 ? s0 : s1;
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nir_def *other = i == 0 ? s1 : s0;
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if (!pos_zero && !neg_zero) {
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/* The lowering is only required when both sources are zero, so
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* if we have a nonzero constant source, skip the lowering.
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*/
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lowered = fminmax;
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} else if (pos_zero && max) {
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/* max(x, +0.0) = +0.0 < x ? x : +0.0 */
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lowered = nir_bcsel(b, nir_flt(b, zero, other), other, zero);
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} else if (neg_zero && !max) {
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/* min(x, -0.0) = x < -0.0 ? x : -0.0 */
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lowered = nir_bcsel(b, nir_flt(b, other, zero), other, zero);
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}
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}
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}
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/* Fallback on the emulation */
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if (!lowered) {
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nir_def *iminmax = max ? nir_imax(b, s0, s1) : nir_imin(b, s0, s1);
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lowered = nir_bcsel(b, nir_feq(b, s0, s1), iminmax, fminmax);
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}
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break;
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}
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default:
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break;
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}
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if (lowered) {
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nir_def_replace(&instr->def, lowered);
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return true;
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} else {
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return false;
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}
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}
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bool
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nir_lower_alu(nir_shader *shader)
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{
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if (!shader->options->lower_bitfield_reverse &&
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!shader->options->lower_bit_count &&
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!shader->options->lower_mul_high &&
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!shader->options->lower_fminmax_signed_zero)
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return false;
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return nir_shader_alu_pass(shader, lower_alu_instr,
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nir_metadata_control_flow, NULL);
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}
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