mesa/src/amd
Samuel Pitoiset d2612bb424 radv: fix resume/suspend render pass with depth/stencil attachment
Shouldn't clear on resume.

This fixes dEQP-VK.dynamic_rendering.*resuming.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14113>
2021-12-08 09:06:27 +00:00
..
addrlib amd/addrlib: Use get_supported_arguments to get compiler args. 2021-11-24 07:03:54 +00:00
ci ac: change family names to uppercase in ac_get_family_name() 2021-11-23 08:07:41 +00:00
common ac/nir: fix left shift of 1 by 31 places detected by UBSAN 2021-11-25 16:15:30 +00:00
compiler aco: Use util_widen_mask. 2021-12-03 18:29:13 +00:00
llvm nir: Rename nir_get_io_vertex_index_src and include per-primitive I/O. 2021-11-16 07:46:55 +00:00
registers python: drop python2 support 2021-08-14 21:44:32 +00:00
vulkan radv: fix resume/suspend render pass with depth/stencil attachment 2021-12-08 09:06:27 +00:00
.clang-format radv: Add clang-format for AMD code. 2021-04-10 03:31:32 +02:00
meson.build radv: Allow building when LLVM isn’t enabled 2021-10-01 10:40:18 +02:00