mesa/src/amd
Timur Kristóf ce3b84cc62 radv: Remove primitive reset index from late scissor workaround.
Primitive reset has a corresponding dirty state which is already
included the used_states so it is not necessary to also check
the primitive reset index here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23459>
2023-06-13 15:26:47 +00:00
..
addrlib amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16 2023-06-01 17:59:39 +00:00
ci radv/ci: update the list of expected failures on STONEY 2023-06-13 07:52:44 +02:00
common ac: Replace the usage of pipe_compare_func with compare_func 2023-06-11 06:27:05 +00:00
compiler aco: validate ir for prologs and after lower_to_hw_instr 2023-06-12 19:43:17 +00:00
drm-shim amd/drm-shim: add raven2 2023-05-22 20:14:22 +00:00
llvm ac/llvm,radeonsi: lower nir_load_user_data_amd in abi 2023-06-13 03:41:02 +00:00
registers ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT 2023-05-24 21:48:19 +00:00
vulkan radv: Remove primitive reset index from late scissor workaround. 2023-06-13 15:26:47 +00:00
meson.build meson: build radeonsi with aco 2023-05-15 02:01:10 +00:00