José Roberto de Souza 0eab7bfabc intel/dev/xe3: Set max_slices and max_subslices_per_slice using hwconfig ... Xe3 different SKUs can have different max_subslices_per_slice and Xe KMD topology uAPI only provide us the available subslices. Therefore, to correctly calculate the available slices, we need max_subslices_per_slice to match the hardware. This change retrieves this information from hwconfig for Xe3+. This avoids adding all the PTL intel_device_info variants. Additionally, the PTL topology values are currently embargoed and cannot be hard-coded in public source code. This could be simplified if we decide to apply max_slices and max_subslices_per_slice to all platforms that hwconfig is required. Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33328>		2025-03-26 23:35:14 +00:00
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intel_device_info.c	intel/dev/xe3: Set max_slices and max_subslices_per_slice using hwconfig	2025-03-26 23:35:14 +00:00
intel_device_info.h	intel/dev: Port intel_dev_info tool to Xe KMD	2023-07-28 15:36:52 +00:00