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Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35256>
128 lines
3.6 KiB
C
128 lines
3.6 KiB
C
/*
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* Copyright 2024 Valve Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/**
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* If a clip/cull distance is constant >= 0,
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* we know that it will never cause clipping/culling.
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* Remove the sysval_output in that case.
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*
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* Assumes that nir_lower_io_to_temporaries was run,
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* and works best with scalar store_outputs.
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*/
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/* Return -1 if invalid, 0 if it's a normal clip/cull distance value,
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* and 1 if it's a no-op value.
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*/
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static int
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analyze_clip_cull_value(nir_intrinsic_instr *intr)
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{
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if (intr->intrinsic != nir_intrinsic_store_output)
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return -1;
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const nir_io_semantics io_sem = nir_intrinsic_io_semantics(intr);
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const unsigned location = io_sem.location;
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if (io_sem.no_sysval_output)
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return -1;
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if (location != VARYING_SLOT_CLIP_DIST0 && location != VARYING_SLOT_CLIP_DIST1)
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return -1;
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nir_def *val = intr->src[0].ssa;
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for (unsigned i = 0; i < val->num_components; i++) {
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nir_scalar s = nir_scalar_resolved(val, i);
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if (!nir_scalar_is_const(s))
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return 0;
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float distance = nir_scalar_as_float(s);
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/* NaN gets clipped, and INF after interpolation is NaN. */
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if (isnan(distance) || distance < 0.0 || distance == INFINITY)
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return 0;
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}
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return 1;
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}
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static bool
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opt_clip_cull_vs_tes(nir_builder *b, nir_intrinsic_instr *intr, void *unused)
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{
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if (analyze_clip_cull_value(intr) == 1) {
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nir_remove_sysval_output(intr, MESA_SHADER_FRAGMENT);
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return true;
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}
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return false;
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}
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/* The types of stores are first gathered for all stores. If a certain slot
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* component is only written by no-op stores, they are removed.
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*/
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typedef struct {
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bool has_normal_store[8];
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bool has_noop_store[8];
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} gs_info;
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static unsigned
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get_clip_io_index(nir_intrinsic_instr *intr)
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{
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nir_io_semantics sem = nir_intrinsic_io_semantics(intr);
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assert(intr->intrinsic == nir_intrinsic_store_output);
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assert(sem.location == VARYING_SLOT_CLIP_DIST0 ||
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sem.location == VARYING_SLOT_CLIP_DIST1);
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assert(sem.num_slots == 1);
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assert(nir_src_as_uint(*nir_get_io_offset_src(intr)) == 0); /* no indirect */
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assert(intr->src[0].ssa->num_components == 1); /* scalar */
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return (sem.location - VARYING_SLOT_CLIP_DIST0) * 4 +
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nir_intrinsic_component(intr);
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}
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static bool
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gather_clip_cull_gs(nir_builder *b, nir_intrinsic_instr *intr, void *unused)
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{
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gs_info *info = (gs_info *)unused;
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int r = analyze_clip_cull_value(intr);
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if (r == 1)
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info->has_noop_store[get_clip_io_index(intr)] = true;
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else if (r == 0)
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info->has_normal_store[get_clip_io_index(intr)] = true;
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return false;
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}
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static bool
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opt_clip_cull_gs(nir_builder *b, nir_intrinsic_instr *intr, void *unused)
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{
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gs_info *info = (gs_info *)unused;
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if (intr->intrinsic == nir_intrinsic_store_output &&
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(nir_intrinsic_io_semantics(intr).location == VARYING_SLOT_CLIP_DIST0 ||
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nir_intrinsic_io_semantics(intr).location == VARYING_SLOT_CLIP_DIST1)) {
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unsigned index = get_clip_io_index(intr);
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if (info->has_noop_store[index] && !info->has_normal_store[index]) {
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nir_remove_sysval_output(intr, MESA_SHADER_FRAGMENT);
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return true;
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}
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}
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return false;
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}
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bool
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nir_opt_clip_cull_const(nir_shader *shader)
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{
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if (shader->info.stage == MESA_SHADER_GEOMETRY) {
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gs_info info = {0};
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nir_shader_intrinsics_pass(shader, gather_clip_cull_gs, nir_metadata_all, &info);
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return nir_shader_intrinsics_pass(shader, opt_clip_cull_gs, nir_metadata_all, &info);
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} else {
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return nir_shader_intrinsics_pass(shader, opt_clip_cull_vs_tes, nir_metadata_all, NULL);
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}
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}
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