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bddfbe7fb1
One advantage here of moving a bunch of stuff to NIR is that we can now have consistent payload types straight from the NIR conversion to BRW. This massively simplifies the BRW lowering code and avoids type errors that are quite common to make in the backend. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37527>
130 lines
4.4 KiB
C
130 lines
4.4 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "dev/intel_device_info.h"
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#include "compiler/nir/nir_builder.h"
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#include "blorp_priv.h"
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static inline void
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blorp_nir_init_shader(nir_builder *b,
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struct blorp_context *blorp,
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void *mem_ctx,
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mesa_shader_stage stage,
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const char *name)
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{
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const nir_shader_compiler_options *nir_options =
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blorp->compiler->nir_options(blorp, stage);
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*b = nir_builder_init_simple_shader(stage, nir_options,
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"%s", name ? name : "");
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ralloc_steal(mem_ctx, b->shader);
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if (stage == MESA_SHADER_FRAGMENT)
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b->shader->info.fs.origin_upper_left = true;
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}
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static inline nir_def *
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blorp_nir_txf_ms_mcs(nir_builder *b, nir_def *xy_pos, nir_def *layer,
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const struct intel_device_info *devinfo)
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{
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nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
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tex->op = nir_texop_txf_ms_mcs_intel;
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tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
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tex->dest_type = nir_type_int32;
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nir_def *coord;
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if (layer) {
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tex->is_array = true;
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tex->coord_components = 3;
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coord = nir_vec3(b, nir_channel(b, xy_pos, 0),
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nir_channel(b, xy_pos, 1),
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layer);
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} else {
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tex->is_array = false;
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tex->coord_components = 2;
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coord = nir_trim_vector(b, xy_pos, 2);
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}
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tex->src[0] = nir_tex_src_for_ssa(
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nir_tex_src_coord,
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devinfo->verx10 >= 125 ? nir_u2u16(b, coord) : coord);
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/* Blorp only has one texture and it's bound at unit 0 */
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tex->texture_index = 0;
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tex->sampler_index = 0;
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nir_def_init(&tex->instr, &tex->def, 4, 32);
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nir_builder_instr_insert(b, &tex->instr);
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return &tex->def;
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}
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static inline nir_def *
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blorp_nir_mcs_is_clear_color(nir_builder *b,
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nir_def *mcs,
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uint32_t samples)
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{
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switch (samples) {
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case 2:
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/* Empirical evidence suggests that the value returned from the
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* sampler is not always 0x3 for clear color so we need to mask it.
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*/
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return nir_ieq_imm(b, nir_iand(b, nir_channel(b, mcs, 0),
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nir_imm_int(b, 0x3)),
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0x3);
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case 4:
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return nir_ieq_imm(b, nir_channel(b, mcs, 0), 0xff);
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case 8:
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return nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0);
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case 16:
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/* For 16x MSAA, the MCS is actually an ivec2 */
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return nir_iand(b, nir_ieq_imm(b, nir_channel(b, mcs, 0), ~0),
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nir_ieq_imm(b, nir_channel(b, mcs, 1), ~0));
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default:
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UNREACHABLE("Invalid sample count");
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}
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}
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static inline nir_def *
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blorp_check_in_bounds(nir_builder *b,
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nir_def *bounds_rect,
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nir_def *pos)
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{
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nir_def *x0 = nir_channel(b, bounds_rect, 0);
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nir_def *x1 = nir_channel(b, bounds_rect, 1);
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nir_def *y0 = nir_channel(b, bounds_rect, 2);
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nir_def *y1 = nir_channel(b, bounds_rect, 3);
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nir_def *c0 = nir_uge(b, nir_channel(b, pos, 0), x0);
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nir_def *c1 = nir_ult(b, nir_channel(b, pos, 0), x1);
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nir_def *c2 = nir_uge(b, nir_channel(b, pos, 1), y0);
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nir_def *c3 = nir_ult(b, nir_channel(b, pos, 1), y1);
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nir_def *in_bounds =
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nir_iand(b, nir_iand(b, c0, c1), nir_iand(b, c2, c3));
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return in_bounds;
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}
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