mesa/src/intel
Jianxun Zhang cb7f816fc4 intel/common: Ensure SIMD16 for fast-clear kernel (xe2)
Add a restriction on SIMD mode for fast-clear pixel
shader according to the Bspec.

Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29907>
2024-07-26 21:02:24 +00:00
..
blorp anv: Propagate protected information to blorp_batch_isl_copy_usage() 2024-07-26 20:36:32 +00:00
ci ci: simplify setting .no-auto-retry now that it isn't bundled with unrelated rules: 2024-07-07 19:31:44 +00:00
common intel/common: Ensure SIMD16 for fast-clear kernel (xe2) 2024-07-26 21:02:24 +00:00
compiler intel/brw: Move interp_reg and per_primitive_reg out of fs_visitor 2024-07-25 15:37:13 +00:00
decoder intel/decoder: Add intel_print_group_custom_spacing() 2024-04-24 17:07:50 +00:00
dev intel/brw: Add a maximum scratch size restriction 2024-07-22 18:17:38 +00:00
ds anv: Remove extra hdc_flush from Perfetto 2024-07-23 01:57:59 +00:00
genxml intel/genxml: add the BLT and COMP_CTX0 versions of the TR-TT registers 2024-07-22 10:04:33 -07:00
isl isl: Fix Xe2 protected mask 2024-07-26 20:36:32 +00:00
nullhw-layer build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
perf intel: Rename XE_PERF to XE_OBSERVATION 2024-07-17 01:00:34 +00:00
shaders meson: use glslang --depfile argument when possible 2024-05-20 17:34:17 +00:00
tools build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
vulkan anv: Propagate protected information to blorp_batch_isl_copy_usage() 2024-07-26 20:36:32 +00:00
vulkan_hasvk format: Generate endian-independent format aliases 2024-07-19 13:50:42 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00