Bas Nieuwenhuizen d7e1f492bc radv: Disable displayable DCC for GFX8 properly. ... On scanout the GFX8 ac_surface doesn't clear the size but only doesn't allocate space and hence dcc_offset is 0. This is the same as radeonsi. Fixes: 7acb30de8a ("radv: Enable displayable DCC.") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4346 Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9221>		2021-02-23 16:57:04 +00:00
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addrlib	amd: update addrlib	2021-02-15 09:15:10 +00:00
ci	ci: Move the piglit expectations lists to the per-driver CI dirs.	2021-02-22 23:02:43 +00:00
common	ac/rgp: define EM_AMDGPU if missing for compatibility	2021-02-23 15:19:41 +00:00
compiler	aco: don't rematerialize exec	2021-02-23 14:41:31 +00:00
llvm	radv,ac/nir: implement non-uniform get_ssbo_size	2021-01-27 13:00:33 +00:00
registers	radeonsi: skip s_sendmsg(gs_alloc_req) for NGG passthrough on new chips	2021-02-13 04:56:05 +00:00
vulkan	radv: Disable displayable DCC for GFX8 properly.	2021-02-23 16:57:04 +00:00
Android.addrlib.mk	android: amd/addrlib: add gfx10 support	2019-07-10 09:03:55 +02:00
Android.common.mk	android: amd/registers: switch to new generated register definitions	2020-09-06 20:20:34 +02:00
Android.compiler.mk	android: aco/isel: Move context initialization code to a dedicated file	2020-09-14 21:26:53 +02:00
Android.mk	android: aco: add support for libmesa_aco	2019-09-28 15:56:34 +02:00
Makefile.sources	ac/rgp: add helper function to write rgp elf oject	2021-02-19 14:29:47 +00:00
meson.build	aco: add framework for unit testing	2020-07-30 16:13:08 +00:00