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50ab52f135
Four linked D3D12 pipeline-validation problems with GLSL TCS on DXIL: 1) dxil_nir_kill_unused_outputs killed TCS outputs read back by the patch-constant function after a barrier, zeroing the tess factors. Keep shader_out locations with any intra-shader load_deref live regardless of next_stage_read_mask. 2) is_dead_in_variable dropped TES padding placeholders (no local uses) in nir_remove_dead_variables. Also honor prev_stage_written_mask so padded TES inputs stay alive. 3) Preserving (1) leaves HS with outputs the DS doesn't declare, breaking pipeline validation (e.g. piglit's barrier.shader_test). Add dxil_nir_pad_tes_input_signature, called from both link paths, to synthesize matching TES inputs (reusing each TCS output's type so sig shape and stride match byte-for-byte) plus the tess-level inputs -- subsuming the tess-level-only block previously in dxil_spirv_nir_link. Scope the per-variable padding to TCS outputs that TCS itself reads back via load_deref: outputs that neither TES nor TCS consumes get killed from the HS signature, so padding them into DS would make the DS input signature longer than HS output and break validation for SSO pipelines whose TCS declares unused per-patch writes (arb_separate_shader_objects/ mix-and-match-tcs-tes). 4) remove_hs_intrinsics rewrote load_output but not load_per_vertex_output in HS main. With (1) keeping outputs alive, GLSL reads of outputs in main whose result survives DCE (UAV atomics, non-tess per-vertex output writes) left LoadOutputControlPoint in the control-point function, which dxil.dll rejects outside the PCF (CreatePipelineState then fails with E_INVALIDARG). Treat load_per_vertex_output like load_output. Validated on piglit arb_tessellation_shader/execution (WARP + DXC 1.8.2403): barrier now passes; the previously-crashing tcs-output-unmatched and variable-indexing/tcs-output-array-* fail gracefully matching baseline; isoline/isoline-no-tcs remain flakes (pre-existing canary corruption, unrelated). d3d12-quick_shader.txt drops barrier; d3d12-flakes.txt adds isoline-no-tcs alongside isoline. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/41028>
103 lines
4.8 KiB
C
103 lines
4.8 KiB
C
/*
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* Copyright © Microsoft Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef DXIL_NIR_H
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#define DXIL_NIR_H
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#include <stdbool.h>
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#include "nir.h"
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#include "nir_builder.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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bool dxil_nir_lower_8bit_conv(nir_shader *shader);
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bool dxil_nir_lower_16bit_conv(nir_shader *shader);
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bool dxil_nir_algebraic(nir_shader *shader);
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bool dxil_nir_lower_fquantize2f16(nir_shader *shader);
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bool dxil_nir_lower_constant_to_temp(nir_shader *shader);
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bool dxil_nir_flatten_var_arrays(nir_shader *shader, nir_variable_mode modes);
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bool dxil_nir_lower_var_bit_size(nir_shader *shader, nir_variable_mode modes,
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unsigned min_bit_size, unsigned max_bit_size);
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bool dxil_nir_remove_oob_array_accesses(nir_shader *shader);
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bool dxil_nir_scratch_and_shared_to_dxil(nir_shader *shader);
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bool dxil_nir_lower_deref_ssbo(nir_shader *shader);
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bool dxil_nir_opt_alu_deref_srcs(nir_shader *shader);
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bool dxil_nir_lower_upcast_phis(nir_shader *shader, unsigned min_bit_size);
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bool dxil_nir_split_clip_cull_distance(nir_shader *shader);
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bool dxil_nir_lower_double_math(nir_shader *shader);
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bool dxil_nir_lower_system_values_to_zero(nir_shader *shader,
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gl_system_value* system_value,
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uint32_t count);
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bool dxil_nir_lower_system_values(nir_shader *shader);
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bool dxil_nir_split_typed_samplers(nir_shader *shader);
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bool dxil_nir_lower_sysval_to_load_input(nir_shader *s, nir_variable **sysval_vars);
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bool dxil_nir_lower_vs_vertex_conversion(nir_shader *s, enum pipe_format target_formats[]);
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void
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dxil_sort_by_driver_location(nir_shader* s, nir_variable_mode modes);
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void
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dxil_sort_ps_outputs(nir_shader* s);
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void
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dxil_reassign_driver_locations(nir_shader* s, nir_variable_mode modes,
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uint64_t other_stage_mask, const BITSET_WORD *other_stage_frac_mask);
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bool dxil_nir_split_tess_ctrl(nir_shader *nir, nir_function **patch_const_func);
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bool dxil_nir_fixup_tess_level_for_domain(nir_shader *nir);
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bool dxil_nir_set_tcs_patches_in(nir_shader *nir, unsigned num_control_points);
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bool dxil_nir_lower_ubo_array_one_to_static(nir_shader *s);
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bool dxil_nir_fix_io_uint_type(nir_shader *s, uint64_t in_mask, uint64_t out_mask);
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bool dxil_nir_lower_discard_and_terminate(nir_shader* s);
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bool dxil_nir_ensure_position_writes(nir_shader *s);
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bool dxil_nir_lower_sample_pos(nir_shader *s);
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bool dxil_nir_lower_subgroup_id(nir_shader *s);
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bool dxil_nir_lower_num_subgroups(nir_shader *s);
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bool dxil_nir_split_unaligned_loads_stores(nir_shader *shader, nir_variable_mode modes);
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bool dxil_nir_lower_unsupported_subgroup_scan(nir_shader *s);
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bool dxil_nir_forward_front_face(nir_shader *s);
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bool dxil_nir_move_consts(nir_shader *s);
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struct dxil_module;
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bool dxil_nir_analyze_io_dependencies(struct dxil_module *mod, nir_shader *s);
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bool dxil_nir_guess_image_formats(nir_shader *s);
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bool dxil_nir_lower_coherent_loads_and_stores(nir_shader *s);
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bool dxil_nir_kill_undefined_varyings(nir_shader *shader, uint64_t prev_stage_written_mask,
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uint32_t prev_stage_patch_written_mask, const BITSET_WORD *prev_stage_frac_output_mask);
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bool dxil_nir_kill_unused_outputs(nir_shader *shader, uint64_t next_stage_read_mask,
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uint32_t next_stage_patch_read_mask, const BITSET_WORD *next_stage_frac_input_mask);
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void dxil_nir_propagate_interp_to_outputs(nir_shader *prev_stage_nir,
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const nir_shader *fs_nir);
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/* Synthesize placeholder TES inputs mirroring TCS outputs the consumer
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* doesn't already declare, so DXIL signature shapes match. */
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bool dxil_nir_pad_tes_input_signature(nir_shader *tes, const nir_shader *tcs);
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#ifdef __cplusplus
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}
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#endif
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#endif /* DXIL_NIR_H */
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