mesa/src/amd/llvm
Samuel Pitoiset c6bf1597d1 ac/nir: split 8-bit SSBO stores on GFX6
Due to possible alignment issues, make sure to split stores of
8-bit vectors.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4339>
2020-04-03 08:01:28 +00:00
..
ac_llvm_build.c ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv() 2020-03-27 08:05:43 +01:00
ac_llvm_build.h ac/nir: use llvm.amdgcn.rcp in ac_build_fdiv() 2020-03-27 08:05:43 +01:00
ac_llvm_cull.c ac/cull: don't read Position.Z if it's not needed for culling 2020-01-15 15:06:20 -05:00
ac_llvm_cull.h
ac_llvm_helper.cpp radv: remove useless RADV_DEBUG=unsafemath debug option 2019-11-15 09:07:34 +01:00
ac_llvm_util.c ac: don't set old denormals flags with LLVM >= 11 2020-03-17 20:47:48 +00:00
ac_llvm_util.h radeonsi: remove AMD_DEBUG=sisched option 2020-03-06 11:35:12 +01:00
ac_nir_to_llvm.c ac/nir: split 8-bit SSBO stores on GFX6 2020-04-03 08:01:28 +00:00
ac_nir_to_llvm.h radeonsi/nir: don't run si_nir_opts again if there is no change 2019-11-25 16:48:27 -05:00
ac_shader_abi.h amd: join emit_kill() from radv and radeonsi in ac_nir_to_llvm 2020-03-09 12:29:32 +00:00
meson.build meson: inline inc_common 2020-03-28 21:36:54 +01:00