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7a3de9e877
Add support for dumping shader asm containing instruction line numbers matching offsets within instruction state pool buffer. Offsets should match values collected from eu stall sampling. This is required for match eu stall data with individual shader instructions. Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30142>
51 lines
1.8 KiB
C
51 lines
1.8 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "intel_decoder.h"
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#include "intel_decoder_private.h"
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#include "compiler/brw_disasm.h"
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static void
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ctx_disassemble_program_brw(struct intel_batch_decode_ctx *ctx,
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uint32_t ksp,
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const char *short_name,
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const char *name)
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{
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uint64_t addr = ctx->instruction_base + ksp;
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struct intel_batch_decode_bo bo = ctx_get_bo(ctx, true, addr);
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if (!bo.map)
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return;
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fprintf(ctx->fp, "\nReferenced %s:\n", name);
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brw_disassemble_with_errors(ctx->brw, bo.map, 0, NULL, ctx->fp);
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if (ctx->shader_binary) {
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int size = brw_disassemble_find_end(ctx->brw, bo.map, 0);
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ctx->shader_binary(ctx->user_data, short_name, addr,
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bo.map, size);
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}
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}
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void
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intel_batch_decode_ctx_init_brw(struct intel_batch_decode_ctx *ctx,
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const struct brw_isa_info *isa,
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const struct intel_device_info *devinfo,
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FILE *fp, enum intel_batch_decode_flags flags,
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const char *xml_path,
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struct intel_batch_decode_bo (*get_bo)(void *,
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bool,
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uint64_t),
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unsigned (*get_state_size)(void *, uint64_t,
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uint64_t),
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void *user_data)
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{
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intel_batch_decode_ctx_init(ctx, devinfo, fp, flags, xml_path,
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get_bo, get_state_size, user_data);
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ctx->brw = isa;
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ctx->disassemble_program = ctx_disassemble_program_brw;
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}
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