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e9a5da2f4b
this is useful for drivers that want to do selective scalarization of io Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24565>
235 lines
7.5 KiB
C
235 lines
7.5 KiB
C
/*
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* Copyright © 2022 Imagination Technologies Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "compiler/spirv/nir_spirv.h"
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#include "nir/nir.h"
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#include "rogue.h"
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#include "util/macros.h"
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#include <stdbool.h>
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/**
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* \file rogue_nir.c
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*
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* \brief Contains SPIR-V and NIR-specific functions.
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*/
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/**
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* \brief SPIR-V to NIR compilation options.
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*/
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static const struct spirv_to_nir_options spirv_options = {
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.environment = NIR_SPIRV_VULKAN,
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/* Buffer address: (descriptor_set, binding), offset. */
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.ubo_addr_format = nir_address_format_64bit_global,
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};
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static const nir_shader_compiler_options nir_options = {
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.fuse_ffma32 = true,
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};
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static int rogue_glsl_type_size(const struct glsl_type *type, bool bindless)
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{
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return glsl_count_attribute_slots(type, false);
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}
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/**
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* \brief Applies optimizations and passes required to lower the NIR shader into
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* a form suitable for lowering to Rogue IR.
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*
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* \param[in] ctx Shared multi-stage build context.
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* \param[in] shader Rogue shader.
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* \param[in] stage Shader stage.
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*/
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static void rogue_nir_passes(struct rogue_build_ctx *ctx,
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nir_shader *nir,
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gl_shader_stage stage)
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{
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bool progress;
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#if !defined(NDEBUG)
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bool nir_debug_print_shader_prev = nir_debug_print_shader[nir->info.stage];
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nir_debug_print_shader[nir->info.stage] = ROGUE_DEBUG(NIR_PASSES);
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#endif /* !defined(NDEBUG) */
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nir_validate_shader(nir, "after spirv_to_nir");
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NIR_PASS_V(nir, nir_lower_vars_to_ssa);
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/* Splitting. */
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NIR_PASS_V(nir, nir_split_var_copies);
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NIR_PASS_V(nir, nir_split_per_member_structs);
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/* Replace references to I/O variables with intrinsics. */
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NIR_PASS_V(nir,
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nir_lower_io,
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nir_var_shader_in | nir_var_shader_out,
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rogue_glsl_type_size,
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(nir_lower_io_options)0);
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/* Load inputs to scalars (single registers later). */
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/* TODO: Fitrp can process multiple frag inputs at once, scalarise I/O. */
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NIR_PASS_V(nir, nir_lower_io_to_scalar, nir_var_shader_in, NULL, NULL);
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/* Optimize GL access qualifiers. */
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const nir_opt_access_options opt_access_options = {
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.is_vulkan = true,
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};
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NIR_PASS_V(nir, nir_opt_access, &opt_access_options);
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/* Apply PFO code to the fragment shader output. */
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if (nir->info.stage == MESA_SHADER_FRAGMENT)
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NIR_PASS_V(nir, rogue_nir_pfo);
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/* Load outputs to scalars (single registers later). */
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NIR_PASS_V(nir, nir_lower_io_to_scalar, nir_var_shader_out, NULL, NULL);
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/* Lower ALU operations to scalars. */
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NIR_PASS_V(nir, nir_lower_alu_to_scalar, NULL, NULL);
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/* Lower load_consts to scalars. */
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NIR_PASS_V(nir, nir_lower_load_const_to_scalar);
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/* Additional I/O lowering. */
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NIR_PASS_V(nir,
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nir_lower_explicit_io,
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nir_var_mem_ubo,
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spirv_options.ubo_addr_format);
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NIR_PASS_V(nir, nir_lower_io_to_scalar, nir_var_mem_ubo, NULL, NULL);
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NIR_PASS_V(nir, rogue_nir_lower_io);
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/* Algebraic opts. */
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do {
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progress = false;
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NIR_PASS(progress, nir, nir_copy_prop);
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NIR_PASS(progress, nir, nir_opt_cse);
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NIR_PASS(progress, nir, nir_opt_algebraic);
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NIR_PASS(progress, nir, nir_opt_constant_folding);
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NIR_PASS(progress, nir, nir_opt_dce);
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NIR_PASS_V(nir, nir_opt_gcm, false);
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} while (progress);
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/* Late algebraic opts. */
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do {
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progress = false;
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NIR_PASS(progress, nir, nir_opt_algebraic_late);
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NIR_PASS_V(nir, nir_opt_constant_folding);
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NIR_PASS_V(nir, nir_copy_prop);
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NIR_PASS_V(nir, nir_opt_dce);
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NIR_PASS_V(nir, nir_opt_cse);
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} while (progress);
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/* Remove unused constant registers. */
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NIR_PASS_V(nir, nir_opt_dce);
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/* Move loads to just before they're needed. */
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/* Disabled for now since we want to try and keep them vectorised and group
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* them. */
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/* TODO: Investigate this further. */
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/* NIR_PASS_V(nir, nir_opt_move, nir_move_load_ubo | nir_move_load_input); */
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/* TODO: Re-enable scheduling after register pressure tweaks. */
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#if 0
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/* Instruction scheduling. */
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struct nir_schedule_options schedule_options = {
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.threshold = ROGUE_MAX_REG_TEMP / 2,
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};
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NIR_PASS_V(nir, nir_schedule, &schedule_options);
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#endif
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/* Assign I/O locations. */
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nir_assign_io_var_locations(nir,
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nir_var_shader_in,
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&nir->num_inputs,
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nir->info.stage);
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nir_assign_io_var_locations(nir,
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nir_var_shader_out,
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&nir->num_outputs,
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nir->info.stage);
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/* Renumber SSA defs. */
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nir_index_ssa_defs(nir_shader_get_entrypoint(nir));
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/* Gather info into nir shader struct. */
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nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
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/* Clean-up after passes. */
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nir_sweep(nir);
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nir_validate_shader(nir, "after passes");
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if (ROGUE_DEBUG(NIR)) {
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fputs("after passes\n", stdout);
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nir_print_shader(nir, stdout);
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}
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#if !defined(NDEBUG)
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nir_debug_print_shader[nir->info.stage] = nir_debug_print_shader_prev;
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#endif /* !defined(NDEBUG) */
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}
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/**
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* \brief Converts a SPIR-V shader to NIR.
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*
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* \param[in] ctx Shared multi-stage build context.
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* \param[in] entry Shader entry-point function name.
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* \param[in] stage Shader stage.
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* \param[in] spirv_size SPIR-V data length in DWORDs.
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* \param[in] spirv_data SPIR-V data.
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* \param[in] num_spec Number of SPIR-V specializations.
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* \param[in] spec SPIR-V specializations.
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* \return A nir_shader* if successful, or NULL if unsuccessful.
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*/
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PUBLIC
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nir_shader *rogue_spirv_to_nir(rogue_build_ctx *ctx,
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gl_shader_stage stage,
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const char *entry,
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unsigned spirv_size,
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const uint32_t *spirv_data,
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unsigned num_spec,
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struct nir_spirv_specialization *spec)
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{
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nir_shader *nir;
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nir = spirv_to_nir(spirv_data,
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spirv_size,
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spec,
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num_spec,
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stage,
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entry,
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&spirv_options,
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&nir_options);
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if (!nir)
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return NULL;
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ralloc_steal(ctx, nir);
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/* Apply passes. */
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rogue_nir_passes(ctx, nir, stage);
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/* Collect I/O data to pass back to the driver. */
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rogue_collect_io_data(ctx, nir);
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return nir;
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}
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