mesa/src/amd
Samuel Pitoiset bdefab362c radv: simplify radv_emit_hw_vs() slightly
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29132>
2024-05-13 16:10:20 +00:00
..
addrlib amd: import gfx12 addrlib 2024-05-11 22:14:05 -04:00
ci radv: Zero initialize capture replay group handles 2024-05-12 10:28:27 +00:00
common radeonsi/vcn: enable decoding in vcn5. 2024-05-11 22:14:06 -04:00
compiler amd: add gfx12 register definitions into the register header generator 2024-05-11 22:14:05 -04:00
drm-shim amd: Use align64 instead of ALIGN for 64 bit value parameter 2024-01-03 22:02:17 +00:00
llvm ac/llvm: add a workaround for nir_intrinsic_load_constant for LLVM on gfx12 2024-05-11 22:14:06 -04:00
registers amd: add gfx12 register definitions 2024-05-11 22:14:05 -04:00
vpelib amd/vpelib: Bypass de/regam on HLG 2024-05-07 20:43:02 +00:00
vulkan radv: simplify radv_emit_hw_vs() slightly 2024-05-13 16:10:20 +00:00
meson.build amd,radeonsi: add libvpe 2023-12-01 00:23:38 +00:00