Tapani Pälli bc4b7de0d0 intel/fs: implement Wa_14017989577 ... The first instruction of any kernel should have non-zero emask. This restriction needs to be obeyed to avoid GPU hangs. Patch adds a function to insert dummy mov as first instruction to make sure this requirement is fulfilled. Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20194>		2022-12-08 23:58:32 +00:00
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blorp	intel: factor out dispatch PS enabling logic	2022-12-06 00:37:47 +02:00
ci	ci: Add intel kbl xfail to flake	2022-11-30 17:24:03 +00:00
common	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
compiler	intel/fs: implement Wa_14017989577	2022-12-08 23:58:32 +00:00
dev	intel/dev: Add a has_illegal_ccs_values flag	2022-12-06 00:49:17 +00:00
ds	meson: do not use source_root() when possible	2022-11-22 06:11:07 +00:00
genxml	anv: refactor ray tracing dispatch	2022-12-02 09:28:23 +00:00
isl	isl: don't report I915_FORMAT_MOD_Y_TILED_CCS on Gfx8	2022-12-02 09:18:16 +00:00
nullhw-layer	utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*	2022-11-02 07:25:39 +00:00
perf	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00
tools	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
vulkan	anv/hasvk: Clamping Scissor Rect values in a valid range	2022-12-07 12:19:42 +00:00
vulkan_hasvk	hasvk: Report correct multisampling limits on gfx7	2022-12-08 00:16:44 +00:00
meson.build	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00