Lionel Landwerlin b9403b1c47 intel: factor out dispatch PS enabling logic ... Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Tested-by: Mark Janes <markjanes@swizzler.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20169>		2022-12-06 00:37:47 +02:00
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blorp	intel: factor out dispatch PS enabling logic	2022-12-06 00:37:47 +02:00
ci	ci: Add intel kbl xfail to flake	2022-11-30 17:24:03 +00:00
common	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
compiler	intel: factor out dispatch PS enabling logic	2022-12-06 00:37:47 +02:00
dev	intel/dev: Add (disabled) device info for MTL	2022-12-01 16:22:47 +00:00
ds	meson: do not use source_root() when possible	2022-11-22 06:11:07 +00:00
genxml	anv: refactor ray tracing dispatch	2022-12-02 09:28:23 +00:00
isl	isl: don't report I915_FORMAT_MOD_Y_TILED_CCS on Gfx8	2022-12-02 09:18:16 +00:00
nullhw-layer	utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*	2022-11-02 07:25:39 +00:00
perf	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00
tools	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
vulkan	intel: factor out dispatch PS enabling logic	2022-12-06 00:37:47 +02:00
vulkan_hasvk	intel: factor out dispatch PS enabling logic	2022-12-06 00:37:47 +02:00
meson.build	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00