Georg Lehmann 7afecd8ad8 radv: Check descriptor pool entry count before allocating a new set. ... It's simpler and more efficient. Signed-off-by: Georg Lehmann <dadschoorse@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com> Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17127>		2022-06-20 10:50:01 +00:00
..
addrlib	amd: Initialize Gfx11Lib members in constructor.	2022-05-31 03:36:53 +00:00
ci	radv/ci: test vkd3d on kabini	2022-06-18 19:33:24 +03:00
common	radeonsi/vcn: prepare for unified queue in vcn4	2022-06-16 03:30:47 +00:00
compiler	aco: fix validation of SOP1 instructions without definitions	2022-06-20 07:08:28 +00:00
drm-shim	Use proper types for meson objects	2022-04-18 13:03:08 +03:00
llvm	ac/llvm: fix tcs_wave_id unpacking on gfx11	2022-06-15 20:52:42 +00:00
registers	amd/gfx11: add PixelWaitSync packet fields	2022-06-15 20:52:42 +00:00
vulkan	radv: Check descriptor pool entry count before allocating a new set.	2022-06-20 10:50:01 +00:00
.clang-format	radv: allow holes in inline push constants	2022-04-12 11:44:30 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00