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Iago Toral Quiroga b42f4b8809 broadcom/compiler: padding fixes to QPU assembly dumps 
When there are dst/src modifiers it is pretty common that instructions
take too much space and lead to alignment issues that make code a lot
harder to read, so align the MUL and SIG columns a bit wider to avoid
this:

Before:

0x380021828003faa8 fmax  rf2, rf42.abs, rf40.abs; nop
0x3800f186c503f0f0 fcmp.pushc  -, rf3, rf48; nop
0x380c038b85b83282 fmax  rf11, rf10, rf2; mov.ifa  rf14, rf46
0x3800219ab503f359 and  rf26, rf13, rf25; nop
0x3820f186c503f2f0 fcmp.pushc  -, rf11, rf48; nop           ; thrsw
0x382c013fb5b8368e and  rf63, rf26, rf14; mov.ifa  rf4, rf46; thrsw
0x38002185b503ffc4 and  rf5, rf63, rf4  ; nop
0x38002186b503f141 and  rf6, rf5, rf1   ; nop
0x382031873503f186 vfpack  tlb, rf6, rf6; nop               ; thrsw
0x380031873503f18f vfpack  tlb, rf6, rf15; nop
0x38003186bb03f000 nop                  ; nop

After:

0x380021828003faa8 fmax rf2, rf42.abs, rf40.abs  ; nop
0x3800f186c503f0f0 fcmp.pushc -, rf3, rf48       ; nop
0x380c038b85b83282 fmax rf11, rf10, rf2          ; mov.ifa rf14, rf46
0x3800219ab503f359 and rf26, rf13, rf25          ; nop
0x3820f186c503f2f0 fcmp.pushc -, rf11, rf48      ; nop                         ; thrsw
0x382c013fb5b8368e and rf63, rf26, rf14          ; mov.ifa rf4, rf46           ; thrsw
0x38002185b503ffc4 and rf5, rf63, rf4            ; nop
0x38002186b503f141 and rf6, rf5, rf1             ; nop
0x382031873503f186 vfpack tlb, rf6, rf6          ; nop                         ; thrsw
0x380031873503f18f vfpack tlb, rf6, rf15         ; nop
0x38003186bb03f000 nop                           ; nop

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13545>
2021-10-28 08:12:14 +00:00
..
tests broadcom/compiler: padding fixes to QPU assembly dumps 2021-10-28 08:12:14 +00:00
meson.build meson: use gnu_symbol_visibility argument 2020-06-01 18:59:18 +00:00
qpu_disasm.c broadcom/compiler: padding fixes to QPU assembly dumps 2021-10-28 08:12:14 +00:00
qpu_disasm.h broadcom/qpu: rename from VC5 to V3D 2021-04-29 11:22:12 +02:00
qpu_instr.c broadcom/compiler: rework simultaneous peripheral access checks 2021-10-27 06:03:12 +00:00
qpu_instr.h broadcom/compiler: rework simultaneous peripheral access checks 2021-10-27 06:03:12 +00:00
qpu_pack.c broadcom/compiler: fix condition encoding bug 2021-10-27 06:03:12 +00:00
qpu_validate.c