Felix DeGrood b561bcd78c anv: set ComputeMode.PixelAsyncComputeThreadLimit = 4 ... Heuristic-based optimization throttling CCS work (async compute). Without throttling, background compute work consumes all threads, deminishing performance gains by running dispatch in parallel with 3D work. Optimization is heuristics based, meaning a workload might slow down when using async compute. Best value: PixelAsyncComputeThreadLimit = 4. On DG2, this equates to a max CCS thread occupancy of 37.5%. Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25508>		2023-10-17 18:09:29 +00:00
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blorp	blorp: Use the correct miptail start LOD for surfaces	2023-10-13 21:58:59 +00:00
ci	ci/traces: keep images for every job except the performance testing	2023-10-10 12:46:51 +00:00
common	intel/common: Add sse2_args for 32-bit build when -Dsse2=false was set	2023-09-15 17:39:55 -07:00
compiler	intel-clc: avoid using spirv-linker.	2023-10-17 13:53:52 +10:00
dev	intel: Sync xe_drm.h	2023-09-13 16:38:15 +00:00
ds	intel/ds: provide names for different events of a timeline's row	2023-10-17 11:19:13 +00:00
genxml	anv: enable FCV for Gen12.5	2023-10-11 12:18:15 +00:00
isl	isl: Use 16-bit instead of 8-bits for surface format info fields	2023-10-02 17:24:33 +00:00
nullhw-layer	meson: support installation tags	2023-09-11 13:00:45 +00:00
perf	intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h	2023-07-28 15:36:52 +00:00
tools	intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c	2023-09-06 01:39:53 +00:00
vulkan	anv: set ComputeMode.PixelAsyncComputeThreadLimit = 4	2023-10-17 18:09:29 +00:00
vulkan_hasvk	hasvk: Use the common GetPhysicalDeviceFeatures2 implementation	2023-09-27 23:02:29 +00:00
meson.build	intel: Only build perf if drivers or tools are enabled	2023-08-31 21:53:19 +00:00