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f48b3bee31
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30006>
106 lines
2 KiB
C
106 lines
2 KiB
C
/*
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* Copyright © 2018 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#ifndef BRW_ASM_INTERNAL_H
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#define BRW_ASM_INTERNAL_H
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/* Assembler internal state and definitions used by the brw_gram/brw_lex. */
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#include <inttypes.h>
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#include <stdbool.h>
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#include <assert.h>
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#include "compiler/brw_reg.h"
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#include "compiler/brw_reg_type.h"
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#include "compiler/brw_eu_defines.h"
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#include "compiler/brw_inst.h"
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#include "compiler/brw_eu.h"
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#include "dev/intel_device_info.h"
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#include "util/list.h"
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/* glibc < 2.27 defines OVERFLOW in /usr/include/math.h. */
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#undef OVERFLOW
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int yyparse(void);
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int yylex(void);
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char *lex_text(void);
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extern struct brw_codegen *p;
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extern int errors;
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extern const char *input_filename;
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extern struct list_head instr_labels;
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extern struct list_head target_labels;
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struct condition {
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unsigned cond_modifier:4;
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unsigned flag_reg_nr:1;
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unsigned flag_subreg_nr:1;
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};
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struct predicate {
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unsigned pred_control:4;
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unsigned pred_inv:1;
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unsigned flag_reg_nr:1;
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unsigned flag_subreg_nr:1;
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};
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enum instoption_type {
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INSTOPTION_FLAG,
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INSTOPTION_DEP_INFO,
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INSTOPTION_CHAN_OFFSET,
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};
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struct instoption {
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enum instoption_type type;
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union {
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unsigned uint_value;
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struct tgl_swsb depinfo_value;
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};
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};
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struct options {
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uint8_t chan_offset;
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unsigned access_mode:1;
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unsigned compression_control:2;
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unsigned thread_control:2;
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unsigned no_dd_check:1; // Dependency control
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unsigned no_dd_clear:1; // Dependency control
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unsigned mask_control:1;
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unsigned debug_control:1;
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unsigned acc_wr_control:1;
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unsigned end_of_thread:1;
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unsigned compaction:1;
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unsigned is_compr:1;
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struct tgl_swsb depinfo;
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};
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struct msgdesc {
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unsigned ex_bso:1;
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unsigned src1_len:5;
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};
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enum instr_label_type {
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INSTR_LABEL_JIP,
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INSTR_LABEL_UIP,
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};
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struct instr_label {
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struct list_head link;
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char *name;
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int offset;
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enum instr_label_type type;
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};
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struct target_label {
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struct list_head link;
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char *name;
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int offset;
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};
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#endif /* BRW_ASM_H */
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