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This does shader analysis that is more niche than regular shader info.
It's planned to be used by nir_restructure_tcs_flow as discussed here:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11910
It's also useful for driver-specific passes.
The code for gathering "all_invocations_define_tess_levels" is copied
from radeonsi. The rest is new.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31447>
334 lines
13 KiB
C
334 lines
13 KiB
C
/*
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* Copyright © 2024 Advanced Micro Devices, Inc.
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*
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* SPDX-License-Identifier: MIT
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*/
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#include "nir.h"
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#include <math.h>
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static unsigned
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get_tess_level_component(nir_intrinsic_instr *intr)
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{
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unsigned location = nir_intrinsic_io_semantics(intr).location;
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return (location == VARYING_SLOT_TESS_LEVEL_INNER ? 4 : 0) +
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nir_intrinsic_component(intr);
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}
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static unsigned
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get_inst_tesslevel_writemask(nir_intrinsic_instr *intr)
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{
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if (intr->intrinsic != nir_intrinsic_store_output)
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return 0;
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unsigned location = nir_intrinsic_io_semantics(intr).location;
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if (location != VARYING_SLOT_TESS_LEVEL_OUTER &&
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location != VARYING_SLOT_TESS_LEVEL_INNER)
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return 0;
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return nir_intrinsic_write_mask(intr) << get_tess_level_component(intr);
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}
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static bool
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is_tcs_output_barrier(nir_intrinsic_instr *intr)
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{
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return intr->intrinsic == nir_intrinsic_barrier &&
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nir_intrinsic_memory_modes(intr) & nir_var_shader_out &&
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nir_intrinsic_memory_scope(intr) >= SCOPE_WORKGROUP &&
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nir_intrinsic_execution_scope(intr) >= SCOPE_WORKGROUP;
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}
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static void
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scan_tess_levels(struct exec_list *cf_list, unsigned *upper_block_tl_writemask,
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unsigned *cond_block_tl_writemask,
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bool *all_invocs_define_tess_levels, bool is_nested_cf)
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{
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foreach_list_typed(nir_cf_node, cf_node, node, cf_list) {
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switch (cf_node->type) {
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case nir_cf_node_block: {
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nir_block *block = nir_cf_node_as_block(cf_node);
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nir_foreach_instr (instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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if (!is_tcs_output_barrier(intrin)) {
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*upper_block_tl_writemask |= get_inst_tesslevel_writemask(intrin);
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continue;
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}
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/* This is a barrier. If it's in nested control flow, put this
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* in the too hard basket. In GLSL this is not possible but it is
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* in SPIR-V.
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*/
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if (is_nested_cf) {
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*all_invocs_define_tess_levels = false;
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return;
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}
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/* The following case must be prevented:
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* gl_TessLevelInner = ...;
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* barrier();
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* if (gl_InvocationID == 1)
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* gl_TessLevelInner = ...;
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*
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* If you consider disjoint code segments separated by barriers,
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* each such segment that writes tess level channels should write
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* the same channels in all codepaths within that segment.
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*/
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if (*upper_block_tl_writemask || *cond_block_tl_writemask) {
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/* Accumulate the result: */
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*all_invocs_define_tess_levels &=
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!(*cond_block_tl_writemask & ~(*upper_block_tl_writemask));
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/* Analyze the next code segment from scratch. */
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*upper_block_tl_writemask = 0;
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*cond_block_tl_writemask = 0;
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}
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}
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break;
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}
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case nir_cf_node_if: {
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unsigned then_tesslevel_writemask = 0;
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unsigned else_tesslevel_writemask = 0;
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nir_if *if_stmt = nir_cf_node_as_if(cf_node);
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scan_tess_levels(&if_stmt->then_list, &then_tesslevel_writemask,
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cond_block_tl_writemask,
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all_invocs_define_tess_levels, true);
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scan_tess_levels(&if_stmt->else_list, &else_tesslevel_writemask,
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cond_block_tl_writemask,
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all_invocs_define_tess_levels, true);
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if (then_tesslevel_writemask || else_tesslevel_writemask) {
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/* If both statements write the same tess level channels,
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* we can say that the upper block writes them too.
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*/
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*upper_block_tl_writemask |= then_tesslevel_writemask &
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else_tesslevel_writemask;
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*cond_block_tl_writemask |= then_tesslevel_writemask |
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else_tesslevel_writemask;
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}
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break;
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}
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case nir_cf_node_loop: {
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nir_loop *loop = nir_cf_node_as_loop(cf_node);
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assert(!nir_loop_has_continue_construct(loop));
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scan_tess_levels(&loop->body, cond_block_tl_writemask,
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cond_block_tl_writemask,
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all_invocs_define_tess_levels, true);
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break;
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}
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default:
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unreachable("unknown cf node type");
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}
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}
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}
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static bool
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all_invocations_define_tess_levels(const struct nir_shader *nir)
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{
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assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
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/* The pass works as follows:
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*
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* If all codepaths write tess levels, we can say that all invocations
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* define tess level values. Whether a tess level value is defined is
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* determined for each component separately.
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*/
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unsigned main_block_tl_writemask = 0; /* if main block writes tess levels */
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unsigned cond_block_tl_writemask = 0; /* if cond block writes tess levels */
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/* Initial value = true. Here the pass will accumulate results from
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* multiple segments surrounded by barriers. If tess levels aren't
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* written at all, it's a shader bug and we don't care if this will be
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* true.
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*/
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bool result = true;
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nir_foreach_function_impl(impl, nir) {
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scan_tess_levels(&impl->body, &main_block_tl_writemask,
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&cond_block_tl_writemask,
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&result, false);
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}
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/* Accumulate the result for the last code segment separated by a
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* barrier.
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*/
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if (main_block_tl_writemask || cond_block_tl_writemask)
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result &= !(cond_block_tl_writemask & ~main_block_tl_writemask);
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return result;
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}
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/* It's OK to pass UNSPECIFIED to prim and spacing. */
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void
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nir_gather_tcs_info(const nir_shader *nir, nir_tcs_info *info,
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enum tess_primitive_mode prim,
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enum gl_tess_spacing spacing)
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{
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memset(info, 0, sizeof(*info));
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info->all_invocations_define_tess_levels =
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all_invocations_define_tess_levels(nir);
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unsigned tess_level_writes_le_zero = 0;
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unsigned tess_level_writes_le_one = 0;
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unsigned tess_level_writes_le_two = 0;
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unsigned tess_level_writes_other = 0;
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/* Gather barriers and which values are written to tess level outputs. */
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nir_foreach_function_impl(impl, nir) {
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nir_foreach_block(block, impl) {
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nir_foreach_instr(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
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if (is_tcs_output_barrier(intr)) {
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/* Only gather barriers outside control flow. */
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if (block->cf_node.parent->type == nir_cf_node_function)
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info->always_executes_barrier = true;
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continue;
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}
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if (intr->intrinsic != nir_intrinsic_store_output)
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continue;
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unsigned location = nir_intrinsic_io_semantics(intr).location;
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if (location != VARYING_SLOT_TESS_LEVEL_OUTER &&
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location != VARYING_SLOT_TESS_LEVEL_INNER)
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continue;
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unsigned base_shift = get_tess_level_component(intr);
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unsigned writemask = nir_intrinsic_write_mask(intr);
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u_foreach_bit(i, writemask) {
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nir_scalar scalar = nir_scalar_resolved(intr->src[0].ssa, i);
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unsigned shift = base_shift + i;
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if (nir_scalar_is_const(scalar)) {
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float f = nir_scalar_as_float(scalar);
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if (f <= 0 || isnan(f))
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tess_level_writes_le_zero |= BITFIELD_BIT(shift);
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else if (f <= 1)
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tess_level_writes_le_one |= BITFIELD_BIT(shift);
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else if (f <= 2)
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tess_level_writes_le_two |= BITFIELD_BIT(shift);
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else
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tess_level_writes_other |= BITFIELD_BIT(shift);
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} else {
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/* TODO: This could use range analysis. */
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tess_level_writes_other |= BITFIELD_BIT(shift);
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}
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}
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}
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}
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}
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/* Determine which outer tess level components can discard patches.
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* If the primitive type is unspecified, we have to assume the worst case.
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*/
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unsigned min_outer, min_inner, max_outer, max_inner;
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mesa_count_tess_level_components(prim == TESS_PRIMITIVE_UNSPECIFIED ?
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TESS_PRIMITIVE_ISOLINES : prim,
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&min_outer, &min_inner);
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mesa_count_tess_level_components(prim, &max_outer, &max_inner);
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const unsigned min_valid_outer_comp_mask = BITFIELD_RANGE(0, min_outer);
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const unsigned max_valid_outer_comp_mask = BITFIELD_RANGE(0, max_outer);
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const unsigned max_valid_inner_comp_mask = BITFIELD_RANGE(4, max_inner);
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/* All tessellation levels are effectively 0 if the patch has at least one
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* outer tess level component either in the [-inf, 0] range or equal to NaN,
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* causing it to be discarded. Inner tess levels have no effect.
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*/
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info->all_tess_levels_are_effectively_zero =
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tess_level_writes_le_zero & ~tess_level_writes_le_one &
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~tess_level_writes_le_two & ~tess_level_writes_other &
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min_valid_outer_comp_mask;
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const unsigned tess_level_writes_any =
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tess_level_writes_le_zero | tess_level_writes_le_one |
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tess_level_writes_le_two | tess_level_writes_other;
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const bool outer_is_gt_zero_le_one =
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(tess_level_writes_le_one & ~tess_level_writes_le_zero &
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~tess_level_writes_le_two & ~tess_level_writes_other &
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max_valid_outer_comp_mask) ==
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(tess_level_writes_any & max_valid_outer_comp_mask);
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/* Whether the inner tess levels are in the [-inf, 1] range. */
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const bool inner_is_le_one =
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((tess_level_writes_le_zero | tess_level_writes_le_one) &
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~tess_level_writes_le_two & ~tess_level_writes_other &
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max_valid_inner_comp_mask) ==
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(tess_level_writes_any & max_valid_inner_comp_mask);
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/* If the patch has tess level values set to 1 or equivalent numbers, it's
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* not discarded, but different things happen depending on the spacing.
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*/
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switch (spacing) {
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case TESS_SPACING_EQUAL:
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case TESS_SPACING_FRACTIONAL_ODD:
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case TESS_SPACING_UNSPECIFIED:
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/* The tessellator clamps all tess levels greater than 0 to 1.
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* If all outer and inner tess levels are in the (0, 1] range, which is
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* effectively 1, untessellated patches are drawn.
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*/
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info->all_tess_levels_are_effectively_one = outer_is_gt_zero_le_one &&
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inner_is_le_one;
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break;
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case TESS_SPACING_FRACTIONAL_EVEN: {
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/* The tessellator clamps all tess levels to 2 (both outer and inner)
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* except outer tess level component 0 of isolines, which is clamped
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* to 1. If all outer tess levels are in the (0, 2] or (0, 1] range
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* (for outer[0] of isolines) and all inner tess levels are
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* in the [-inf, 2] range, it's the same as writing 1 to all tess
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* levels.
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*/
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bool isolines_are_eff_one =
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/* The (0, 1] range of outer[0]. */
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(tess_level_writes_le_one & ~tess_level_writes_le_zero &
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~tess_level_writes_le_two & ~tess_level_writes_other & 0x1) ==
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(tess_level_writes_any & 0x1) &&
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/* The (0, 2] range of outer[1]. */
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((tess_level_writes_le_one | tess_level_writes_le_two) &
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~tess_level_writes_le_zero & ~tess_level_writes_other & 0x2) ==
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(tess_level_writes_any & 0x2);
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bool triquads_are_eff_one =
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/* The (0, 2] outer range. */
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((tess_level_writes_le_one | tess_level_writes_le_two) &
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~tess_level_writes_le_zero & ~tess_level_writes_other &
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max_valid_outer_comp_mask) ==
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(tess_level_writes_any & max_valid_outer_comp_mask) &&
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/* The [-inf, 2] inner range. */
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((tess_level_writes_le_zero | tess_level_writes_le_one |
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tess_level_writes_le_two) & ~tess_level_writes_other &
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max_valid_inner_comp_mask) ==
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(tess_level_writes_any & max_valid_inner_comp_mask);
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if (prim == TESS_PRIMITIVE_UNSPECIFIED) {
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info->all_tess_levels_are_effectively_one = isolines_are_eff_one &&
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triquads_are_eff_one;
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} else if (prim == TESS_PRIMITIVE_ISOLINES) {
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info->all_tess_levels_are_effectively_one = isolines_are_eff_one;
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} else {
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info->all_tess_levels_are_effectively_one = triquads_are_eff_one;
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}
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break;
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}
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}
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assert(!info->all_tess_levels_are_effectively_zero ||
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!info->all_tess_levels_are_effectively_one);
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info->discards_patches =
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(tess_level_writes_le_zero & min_valid_outer_comp_mask) != 0;
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}
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