Turo Lamminen b2df787058 radv: Optimize emitting prefetches ... Check the need for emitting prefetch before calling si_emit_cache_flush to mask a possible cache miss delay and always inline radv_emit_prefetch_L2. Either change alone is not significant but together they increase drawcall throughput by 8% on i5-2500. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20877>		2023-01-27 15:05:03 +00:00
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addrlib	meson: Enable initialized-but-unused warning for MSVC	2022-11-17 21:20:38 +00:00
ci	ci: Add manual rules variations to disable irrelevant driver jobs.	2023-01-26 00:48:19 +00:00
common	ac,radeonsi: move shadow regs create ib preamble function to amd common	2023-01-25 04:53:34 +00:00
compiler	meson: avoid using deprecated build_root() method	2023-01-27 11:35:50 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: remove llvm:: now that we use "using namespace llvm"	2023-01-26 19:33:55 -05:00
registers	amd/registers: regenerate gfx11 headers from amd-staging-drm-next	2022-11-04 00:42:08 +00:00
vulkan	radv: Optimize emitting prefetches	2023-01-27 15:05:03 +00:00
.clang-format	radv: Add nir_foreach_variable_with_modes to .clang-format	2022-12-09 07:07:10 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00