mesa/src/amd
Bas Nieuwenhuizen 1b5dc33caa radv: Convert instance bvh address to node in bvh build.
So we don't have to do it in the traversal loop. Should 2 and
instructions and a 64-bit shift, so 4/8 cycles per instance node
visit.

Totals from 7 (0.01% of 134913) affected shaders:

CodeSize: 208460 -> 208292 (-0.08%)
Instrs: 38276 -> 38248 (-0.07%)
Latency: 803181 -> 803142 (-0.00%)
InvThroughput: 165384 -> 165376 (-0.00%)
Copies: 4912 -> 4905 (-0.14%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19706>
2022-11-19 14:24:36 +00:00
..
addrlib meson: Enable initialized-but-unused warning for MSVC 2022-11-17 21:20:38 +00:00
ci ci/amd: drop glmark2 traces, useless 2022-11-18 14:42:32 +00:00
common util: Move src/gallium/include/pipe/p_format.h to src/util/format/u_formats.h 2022-11-19 03:38:19 +00:00
compiler aco: fixes error: 'uint' was not declared in aco_instruction_selection.cpp 2022-11-19 01:37:46 +00:00
drm-shim r300: use drm_shim_override 2022-11-16 14:37:47 +00:00
llvm ac/llvm: fix gfx11 fs input load for 16bit varying 2022-11-15 05:43:37 +00:00
registers amd/registers: regenerate gfx11 headers from amd-staging-drm-next 2022-11-04 00:42:08 +00:00
vulkan radv: Convert instance bvh address to node in bvh build. 2022-11-19 14:24:36 +00:00
.clang-format radv: Add REF as a typename macro to .clang-format 2022-10-30 19:48:46 +00:00
meson.build meson: build radeon drm-shim also for r300 and r600 2022-11-16 14:37:47 +00:00