Georg Lehmann 80b8bbf0c5 aco/gfx11: use v_swap_b16 ... I tested that v_swap_b16 can be encoded as VOP3, because the ISA doc doesn't list it as a possible VOP3 opcode. VOP3 is nessecary to access v128+. Foz-DB Navi31: Totals from 32 (0.04% of 79395) affected shaders: Instrs: 201865 -> 195168 (-3.32%) CodeSize: 1082220 -> 1031228 (-4.71%); split: -4.71%, +0.00% Latency: 2258198 -> 2238586 (-0.87%) InvThroughput: 796731 -> 788934 (-0.98%) Copies: 34514 -> 29220 (-15.34%) VALU: 122457 -> 117163 (-4.32%) Reviewed-by: Daniel Schürmann <daniel@schuermann.dev> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29143>		2024-05-13 18:42:19 +00:00
..
addrlib	amd: import gfx12 addrlib	2024-05-11 22:14:05 -04:00
ci	radeonsi/ci: document new crash (assert)	2024-05-13 18:23:35 +00:00
common	radeonsi/vcn: enable decoding in vcn5.	2024-05-11 22:14:06 -04:00
compiler	aco/gfx11: use v_swap_b16	2024-05-13 18:42:19 +00:00
drm-shim	amd: Use align64 instead of ALIGN for 64 bit value parameter	2024-01-03 22:02:17 +00:00
llvm	ac/llvm: add a workaround for nir_intrinsic_load_constant for LLVM on gfx12	2024-05-11 22:14:06 -04:00
registers	amd: add gfx12 register definitions	2024-05-11 22:14:05 -04:00
vpelib	amd/vpelib: Bypass de/regam on HLG	2024-05-07 20:43:02 +00:00
vulkan	radv: advertise VK_EXT_legacy_vertex_attributes	2024-05-13 17:22:27 +00:00
meson.build	amd,radeonsi: add libvpe	2023-12-01 00:23:38 +00:00