Michael Cheng ad328bc58d intel: Switch uint64_t intel_debug to a bitset ... We are reaching our limit of adding flags to intel_debug (apporaching 64 flags). Switch intel_debug to a bitset, which gives us almost "unlimited" bits to use in the future. v2(Michael Cheng): Fixed a few ci errors Signed-off-by: Michael Cheng <michael.cheng@intel.com> Reviewed-by: Casey Bowman <casey.g.bowman@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34596>		2025-04-22 23:09:26 +00:00
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blorp	intel: Fix the MOCS values in XY_BLOCK_COPY_BLT for Xe2+	2025-04-22 20:42:25 +00:00
ci	ci/piglit: Use structured tagging for Piglit	2025-04-17 09:22:39 +00:00
common	intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs	2025-03-10 17:23:07 -07:00
compiler	intel: Switch uint64_t intel_debug to a bitset	2025-04-22 23:09:26 +00:00
decoder	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
dev	intel: Switch uint64_t intel_debug to a bitset	2025-04-22 23:09:26 +00:00
ds	perfetto/android: align datasource names with tooling expectations	2025-04-08 18:29:10 +00:00
executor	intel/executor: Reorganize -h and --help	2025-04-22 17:14:22 +00:00
genxml	intel: Fix the MOCS values in XY_BLOCK_COPY_BLT for Xe2+	2025-04-22 20:42:25 +00:00
isl	intel: Fix the MOCS values in XY_FAST_COLOR_BLT for Xe2+	2025-04-22 20:42:25 +00:00
nullhw-layer	build: pass licensing information in SPDX form	2024-06-29 12:42:49 -07:00
perf	intel: Switch uint64_t intel_debug to a bitset	2025-04-22 23:09:26 +00:00
shaders	intel: use common CL args	2025-03-06 00:43:59 +00:00
tools	intel/tools: fix 32b build for EU stall tool	2025-04-09 21:40:46 +00:00
vulkan	intel: Fix the MOCS values in XY_FAST_COLOR_BLT for Xe2+	2025-04-22 20:42:25 +00:00
vulkan_hasvk	spirv, nir: Delay calculation of shared_size when using explicit layout	2025-04-17 19:13:17 +00:00
meson.build	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00