mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-22 13:30:12 +01:00
792d77165b
Transforming this :
0x00c77084: 0x11000001: MI_LOAD_REGISTER_IMM
0x00c77088: 0x0000b020 : Dword 1
Register Offset: 0x0000b020
0x00c7708c: 0x00880038 : Dword 2
Data DWord: 8912952
Into this:
0x007880f0: 0x11000001: MI_LOAD_REGISTER_IMM
0x007880f4: 0x0000b020 : Dword 1
Register Offset: 0x0000b020
0x007880f8: 0x00080040 : Dword 2
Data DWord: 524352
register L3CNTLREG2 (0xb020) : 0x80040
SLM Enable: 0
URB Allocation: 32
URB Low Bandwidth: 0
RO Allocation: 32
RO Low Bandwidth: 0
DC Allocation: 0
DC Low Bandwidth: 0
v2: Drop unused arguments (Sirisha)
Print out register name
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
101 lines
3 KiB
C
101 lines
3 KiB
C
/*
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* Copyright © 2016 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#pragma once
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#include <stdint.h>
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#include <stdbool.h>
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struct gen_spec;
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struct gen_group;
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struct gen_field;
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static inline uint32_t gen_make_gen(uint32_t major, uint32_t minor)
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{
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return (major << 8) | minor;
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}
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struct gen_group *gen_spec_find_struct(struct gen_spec *spec, const char *name);
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struct gen_spec *gen_spec_load(const char *filename);
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uint32_t gen_spec_get_gen(struct gen_spec *spec);
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struct gen_group *gen_spec_find_instruction(struct gen_spec *spec, const uint32_t *p);
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struct gen_group *gen_spec_find_register(struct gen_spec *spec, uint32_t offset);
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int gen_group_get_length(struct gen_group *group, const uint32_t *p);
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const char *gen_group_get_name(struct gen_group *group);
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uint32_t gen_group_get_opcode(struct gen_group *group);
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struct gen_field_iterator {
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struct gen_group *group;
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const char *name;
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char value[128];
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const uint32_t *p;
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int i;
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};
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struct gen_group {
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char *name;
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int nfields;
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struct gen_field **fields;
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uint32_t group_offset, group_count;
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uint32_t opcode_mask;
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uint32_t opcode;
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/* Register specific */
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uint32_t register_offset;
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};
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struct gen_type {
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enum {
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GEN_TYPE_UNKNOWN,
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GEN_TYPE_INT,
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GEN_TYPE_UINT,
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GEN_TYPE_BOOL,
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GEN_TYPE_FLOAT,
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GEN_TYPE_ADDRESS,
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GEN_TYPE_OFFSET,
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GEN_TYPE_STRUCT,
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GEN_TYPE_UFIXED,
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GEN_TYPE_SFIXED,
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GEN_TYPE_MBO
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} kind;
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/* Struct definition for GEN_TYPE_STRUCT */
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struct gen_group *gen_struct;
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/* Integer and fractional sizes for GEN_TYPE_UFIXED and GEN_TYPE_SFIXED */
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int i, f;
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};
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struct gen_field {
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char *name;
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int start, end;
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struct gen_type type;
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bool has_default;
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uint32_t default_value;
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};
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void gen_field_iterator_init(struct gen_field_iterator *iter,
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struct gen_group *group, const uint32_t *p);
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bool gen_field_iterator_next(struct gen_field_iterator *iter);
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