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4503ff760c
On GFX9 whether the buffer size is interpreted as elements or bytes
depends on whether IDXEN is enabled in the instruction. If the index
is a constant zero, LLVM optimizes IDXEN to 0.
Now the size in elements is interpreted in bytes which of course
results in out of bounds accesses.
The correct fix is most likely to disable the LLVM optimization,
but we need something to work with LLVM <= 6.0.
radeonsi does the max between stride and element count on the CPU
but that results in the size intrinsics returning the wrong size
for the buffer. This would cause CTS errors for radv.
v2: Also include the store changes.
Fixes: e38685cc62 'Revert "radv: disable support for VEGA for now."'
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
197 lines
6.1 KiB
C
197 lines
6.1 KiB
C
/*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef AC_SHADER_ABI_H
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#define AC_SHADER_ABI_H
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#include <llvm-c/Core.h>
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#include "compiler/shader_enums.h"
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struct nir_variable;
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#define AC_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
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enum ac_descriptor_type {
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AC_DESC_IMAGE,
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AC_DESC_FMASK,
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AC_DESC_SAMPLER,
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AC_DESC_BUFFER,
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};
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/* Document the shader ABI during compilation. This is what allows radeonsi and
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* radv to share a compiler backend.
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*/
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struct ac_shader_abi {
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LLVMValueRef base_vertex;
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LLVMValueRef start_instance;
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LLVMValueRef draw_id;
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LLVMValueRef vertex_id;
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LLVMValueRef instance_id;
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LLVMValueRef tcs_patch_id;
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LLVMValueRef tcs_rel_ids;
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LLVMValueRef tes_patch_id;
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LLVMValueRef gs_prim_id;
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LLVMValueRef gs_invocation_id;
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LLVMValueRef frag_pos[4];
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LLVMValueRef front_face;
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LLVMValueRef ancillary;
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LLVMValueRef sample_coverage;
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LLVMValueRef prim_mask;
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/* CS */
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LLVMValueRef local_invocation_ids;
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LLVMValueRef num_work_groups;
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LLVMValueRef workgroup_ids[3];
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LLVMValueRef tg_size;
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/* Vulkan only */
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LLVMValueRef push_constants;
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LLVMValueRef view_index;
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LLVMValueRef outputs[AC_LLVM_MAX_OUTPUTS * 4];
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/* For VS and PS: pre-loaded shader inputs.
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*
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* Currently only used for NIR shaders; indexed by variables'
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* driver_location.
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*/
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LLVMValueRef *inputs;
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void (*emit_outputs)(struct ac_shader_abi *abi,
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unsigned max_outputs,
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LLVMValueRef *addrs);
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void (*emit_vertex)(struct ac_shader_abi *abi,
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unsigned stream,
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LLVMValueRef *addrs);
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void (*emit_primitive)(struct ac_shader_abi *abi,
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unsigned stream);
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void (*emit_kill)(struct ac_shader_abi *abi, LLVMValueRef visible);
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LLVMValueRef (*load_inputs)(struct ac_shader_abi *abi,
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unsigned location,
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unsigned driver_location,
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unsigned component,
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unsigned num_components,
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unsigned vertex_index,
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unsigned const_index,
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LLVMTypeRef type);
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LLVMValueRef (*load_tess_varyings)(struct ac_shader_abi *abi,
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LLVMTypeRef type,
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LLVMValueRef vertex_index,
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LLVMValueRef param_index,
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unsigned const_index,
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unsigned location,
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unsigned driver_location,
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unsigned component,
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unsigned num_components,
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bool is_patch,
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bool is_compact,
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bool load_inputs);
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void (*store_tcs_outputs)(struct ac_shader_abi *abi,
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const struct nir_variable *var,
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LLVMValueRef vertex_index,
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LLVMValueRef param_index,
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unsigned const_index,
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LLVMValueRef src,
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unsigned writemask);
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LLVMValueRef (*load_tess_coord)(struct ac_shader_abi *abi);
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LLVMValueRef (*load_patch_vertices_in)(struct ac_shader_abi *abi);
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LLVMValueRef (*load_tess_level)(struct ac_shader_abi *abi,
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unsigned varying_id);
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LLVMValueRef (*load_ubo)(struct ac_shader_abi *abi, LLVMValueRef index);
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/**
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* Load the descriptor for the given buffer.
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*
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* \param buffer the buffer as presented in NIR: this is the descriptor
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* in Vulkan, and the buffer index in OpenGL/Gallium
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* \param write whether buffer contents will be written
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*/
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LLVMValueRef (*load_ssbo)(struct ac_shader_abi *abi,
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LLVMValueRef buffer, bool write);
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/**
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* Load a descriptor associated to a sampler.
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*
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* \param descriptor_set the descriptor set index (only for Vulkan)
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* \param base_index the base index of the sampler variable
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* \param constant_index constant part of an array index (or 0, if the
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* sampler variable is not an array)
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* \param index non-constant part of an array index (may be NULL)
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* \param desc_type the type of descriptor to load
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* \param image whether the descriptor is loaded for an image operation
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*/
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LLVMValueRef (*load_sampler_desc)(struct ac_shader_abi *abi,
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unsigned descriptor_set,
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unsigned base_index,
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unsigned constant_index,
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LLVMValueRef index,
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enum ac_descriptor_type desc_type,
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bool image, bool write,
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bool bindless);
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/**
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* Load a Vulkan-specific resource.
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*
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* \param index resource index
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* \param desc_set descriptor set
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* \param binding descriptor set binding
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*/
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LLVMValueRef (*load_resource)(struct ac_shader_abi *abi,
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LLVMValueRef index,
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unsigned desc_set,
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unsigned binding);
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LLVMValueRef (*lookup_interp_param)(struct ac_shader_abi *abi,
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enum glsl_interp_mode interp,
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unsigned location);
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LLVMValueRef (*load_sample_position)(struct ac_shader_abi *abi,
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LLVMValueRef sample_id);
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LLVMValueRef (*load_local_group_size)(struct ac_shader_abi *abi);
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LLVMValueRef (*load_sample_mask_in)(struct ac_shader_abi *abi);
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LLVMValueRef (*load_base_vertex)(struct ac_shader_abi *abi);
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/* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently
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* uses it due to promoting D16 to D32, but radv needs it off. */
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bool clamp_shadow_reference;
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/* Whether to workaround GFX9 ignoring the stride for the buffer size if IDXEN=0
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* and LLVM optimizes an indexed load with constant index to IDXEN=0. */
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bool gfx9_stride_size_workaround;
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};
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#endif /* AC_SHADER_ABI_H */
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