Eric Engestrom a8c7a2fb69 ci/amd: split the polaris10 rules into one for each farm ... There is now one polaris10 in each farm, so we need two rules for which one to use. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24996>		2023-09-01 19:35:33 +00:00
..
addrlib	ac/radv: decouple radv vulkan driver and compiler from gallium	2023-08-03 09:45:42 +00:00
ci	ci/amd: split the polaris10 rules into one for each farm	2023-09-01 19:35:33 +00:00
common	amd/common: add AMD_CODE_PROPERTY_ENABLE_WAVEFRONT_SIZE32 property	2023-08-31 20:30:03 +00:00
compiler	aco: use v_cvt_f32_ubyte for signed casts too	2023-09-01 17:21:57 +00:00
drm-shim	amd/drm-shim: use fixed-width types	2023-06-23 18:35:52 +00:00
llvm	ac: drop 64 bit handling for cl workgroup intrinsics	2023-08-30 07:04:33 +00:00
registers	ac: change offsets of DMA_DATA dwords to prevent reg offset conflicts	2023-08-19 19:36:55 +00:00
vulkan	radv: Only generate debug info if required	2023-09-01 07:23:33 +00:00
meson.build	meson: build radeonsi with aco	2023-05-15 02:01:10 +00:00