Jordan Justen a831ee51ae anv: Flush untyped dataport cache DC flush is requested on compute ... Although the following is based on this observations for OpenGL, we probably need this for Vulkan as well. KHR-GL46.texture_buffer.texture_buffer_operations_ssbo_writes writes to an SSBO in a compute program, then issues a memory-barrier, which causes us to add a DC-flush. Then a second compute program samples from the SSBO written by the first compute program. Although we expected the DC-flush to make the writes available to the second compute program, on MTL this wasn't the case. Adding the "Untyped Data-Port Cache Flush" fixes this. The PRM indicates that compute programs must set "Untyped Data-Port Cache Flush" to flush some LSC writes when flushing HDC. Although we are setting DC-flush, and not HDC-flush, it does appear that the following reference might also apply to DC-flush. In the Intel(R) Arc(tm) A-Series Graphics and Intel Data Center GPU Flex Series Open-Source Programmer's Reference Manual, Vol 2a: Command Reference: Instructions, PIPE_CONTROL, HDC Pipeline Flush (DWord 0, Bit 9), there is a programming note: > When the "Pipeline Select" mode is set to "GPGPU", the LSC Untyped > L1 cache flush is controlled by "Untyped Data-Port Cache Flush" bit > in the PIPE_CONTROL command. Ref: a8108f1d44 ("anv: Add missing untyped data port flush on PIPELINE_SELECT") Ref: bd8e8d204d ("iris: Add missing untyped data port flush on PIPELINE_SELECT") Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23176>		2023-06-27 20:56:28 +00:00
..
blorp	intel/blorp: Avoid 32bpc fast clear sampling issue	2023-06-15 14:17:49 +00:00
ci	anv: Only expose video decode bits with KHR_video_decode_queue	2023-06-24 02:54:37 +00:00
common	genxml: enable decoding on compute engine	2023-06-27 19:59:06 +00:00
compiler	treewide: Use nir_builder_create more	2023-06-27 18:13:02 +00:00
dev	isl: add surface creation reporting mechanism	2023-06-21 13:28:34 +00:00
ds	intel/ds: Track CCS cache flush bit	2023-06-26 16:08:20 -07:00
genxml	genxml: enable decoding on compute engine	2023-06-27 19:59:06 +00:00
isl	util: reinstate ENUM_PACKED	2023-06-21 21:51:59 +00:00
nullhw-layer	vulkan/layers: Use PUBLIC instead of VK_LAYER_EXPORT	2023-02-17 03:42:34 +00:00
perf	util: reinstate ENUM_PACKED	2023-06-21 21:51:59 +00:00
tools	intel/aubinator_error_decode: add ccs support	2023-06-27 19:59:06 +00:00
vulkan	anv: Flush untyped dataport cache DC flush is requested on compute	2023-06-27 20:56:28 +00:00
vulkan_hasvk	treewide: Use nir_builder_create more	2023-06-27 18:13:02 +00:00
meson.build	blorp: add dependency on idep_intel_dev	2023-03-03 13:04:23 +00:00