mesa/src/freedreno/common
Danylo Piliaiev cb08ccb378 tu: Exclude SP_UNKNOWN_AE73 from reg stomping
There is a guess that GPU may not be able to handle different values of
certain debug register between BR/BV. This one causes GPU to hang.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25098>
2023-09-08 09:58:06 +00:00
..
disasm.h freedreno/common: Re-indent 2021-04-17 15:38:56 +00:00
fd6_pack.h freedreno/batch: Move submit bo tracking to batch 2023-05-24 00:30:49 +00:00
freedreno_common.h freedreno: Fix or/and'ing two BitmaskEnums 2023-04-01 13:53:31 +00:00
freedreno_dev_info.c freedreno: Early exit in device matching if id doesn't have chip_id 2023-04-27 21:06:46 +00:00
freedreno_dev_info.h freedreno: Add a list of raw magic regs 2023-09-05 16:19:29 +00:00
freedreno_devices.py freedreno: Fully define a730 and a740 device properties 2023-09-05 16:19:29 +00:00
freedreno_gpu_event.h tu: Basic a7xx support 2023-09-05 16:19:30 +00:00
freedreno_guardband.h freedreno/common: Re-indent 2021-04-17 15:38:56 +00:00
freedreno_pm4.h freedreno/pm4: Use unsigned instead of uint to fix musl build 2022-11-12 00:01:31 +00:00
freedreno_stompable_regs.h tu: Exclude SP_UNKNOWN_AE73 from reg stomping 2023-09-08 09:58:06 +00:00
freedreno_uuid.c freedreno/all: Introduce fd_dev_id 2021-08-06 18:51:50 +00:00
freedreno_uuid.h freedreno/common: C++-proof freedreno_uuid.h 2023-03-24 15:49:25 +00:00
meson.build freedreno: Add a list of raw magic regs 2023-09-05 16:19:29 +00:00
msm_proto.h freedreno: Update virtgpu proto 2023-08-08 00:20:48 +00:00
README.rst

Overview
========

Common functionality shared between freedreno drivers (that are not
registers, layout or the compiler), e.g UUID generation.