mesa/src/intel
Caio Oliveira f37c9c873c
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brw: Fix printing of blocks in disassembly when BRW is available
When disassembling and BRW IR is available (which happens in the
generator), there will be pointers to the BRW's basic block structures
that are used to print the block numbers and predecessor/successors
in the output.

There are two challenges:

- Because DO and FLOW instructions are not real instructions, they are
  not emitted in the output but would still cause the output to contain
  empty blocks.  Previous code accounted for DO but still had problems.

- DO blocks have special physical links that don't make sense when the
  DO is not emitted at the end, but they would be shown even if that
  block was omitted.

These issues can be seen here (edited to remove non-essential bits)

```
   START B0 (2 cycles)
mov(8)          g126<1>UD       0x3f800000UD
   END B0 ->B1
   START B2 <-B1 <-B4 (0 cycles)
   END B2 ->B3
   START B3 <-B2 (260 cycles)

LABEL1:
mov(8)          g1<1>D          0D
cmp.ge.f0.0(8)  null<1>D        g2<0,1,0>D      10D
sync nop(1)                     null<0,1,0>UB
send(1)         g0UD            g1UD            nullUD
(+f0.0) break(8) JIP:  LABEL0         UIP:  LABEL0
   END B3 ->B1 ->B5 ->B4
   START B4 <-B3 (1000 cycles)
sync nop(1)                     null<0,1,0>UB
mov(8)          g126<1>UD       g0<0,1,0>UD

LABEL0:
while(8)        JIP:  LABEL1
   END B4 ->B2
   START B5 <-B1 <-B3 (20 cycles)
```

For example:
- Block 1 is missing (a skipped DO block)
- Block 2 is empty (it was a FLOW block)
- Block 3 ends with a link to Block 1 (the special links involving DO
  blocks).

Two key changes were made to fix this.  First, skip the DO and FLOW
blocks completely.  The use_tail ensures that the instruction group is
reused to avoid empty blocks.  Second, when printing, the successors and
predecessors, walk through the skipped blocks.  And finally, don't print
the special blocks.

With the fix, here's the output.  Note the blocks retain their original
BRW IR number.

```
   START B0 (2 cycles)
mov(8)          g127<1>UD       0x3f800000UD
   END B0 ->B3
   START B3 <-B0 <-B4 (260 cycles)

LABEL1:
mov(8)          g1<1>D          0D
cmp.ge.f0.0(8)  null<1>D        g2<0,1,0>D      10D
sync nop(1)                     null<0,1,0>UB
send(1)         g0UD            g1UD            nullUD
(+f0.0) break(8) JIP:  LABEL0         UIP:  LABEL0
   END B3 ->B5 ->B4
   START B4 <-B3 (1000 cycles)
sync nop(1)                     null<0,1,0>UB
mov(8)          g127<1>UD       g0<0,1,0>UD

LABEL0:
while(8)        JIP:  LABEL1
   END B4 ->B3
   START B5 <-B3 (20 cycles)
```

Issue was spotted by Ken.

Fixes: d2c39b1779 ("intel/brw: Always have a (non-DO) block after a DO in the CFG")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36226>
2025-09-06 16:42:05 +00:00
..
blorp blorp: Emit state cache invalidation after every compute dispatch 2025-09-04 00:14:48 +00:00
ci intel/ci: update restricted trace checksums 2025-09-06 11:59:16 +02:00
common intel/gem: Add an intel_gem_supports_dma_buf_sync_file() helper 2025-08-16 00:04:46 -04:00
compiler brw: Fix printing of blocks in disassembly when BRW is available 2025-09-06 16:42:05 +00:00
decoder intel/genxml: Remove support for start/end atttributes 2025-07-23 16:02:14 +00:00
dev intel/dev: provide a helper to detect bmg g31 device 2025-08-26 19:35:33 +00:00
ds intel/ds: Skip expensive timestamp query until necessary 2025-08-29 21:34:43 +00:00
executor build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
genxml intel/genxml: update CACHE_MODE_0 register for gfx200 2025-08-26 19:35:33 +00:00
isl isl: Add support for creating layered surfaces for video encode/decode 2025-09-03 06:41:44 +00:00
nullhw-layer build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
perf intel: fork exec_node/list -> brw_exec_node/list as a private Intel utility 2025-07-31 20:23:02 +00:00
shaders intel: use common CL args 2025-03-06 00:43:59 +00:00
tools build: avoid redefining unreachable() which is standard in C23 2025-07-31 17:49:42 +00:00
vulkan vulkan: Drop the driver_internal from vk_image_view_init/create() 2025-09-05 23:34:14 +00:00
vulkan_hasvk vulkan: Drop the driver_internal from vk_image_view_init/create() 2025-09-05 23:34:14 +00:00
meson.build intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00