Qiang Yu a4b60295a7 aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv ... The side effect is removing the aco/llvm backend bc optimization code and linear/persp_centroid variable. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Qiang Yu <yuq825@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22199>		2023-04-26 03:27:26 +00:00
..
addrlib	amd: update addrlib	2023-03-29 20:36:09 +00:00
ci	ci/deqp: Update to 1.3.5.1 and pull in additional bugfixes from main.	2023-04-25 04:43:10 +00:00
common	ac/nir/ps: remove used nir_variable if created	2023-04-26 03:27:26 +00:00
compiler	aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv	2023-04-26 03:27:26 +00:00
drm-shim	amd: fix typos	2023-04-13 23:08:22 +00:00
llvm	aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv	2023-04-26 03:27:26 +00:00
registers	amd/registers: use gfx9 packet definitions for gfx940	2023-04-06 15:00:54 +00:00
vulkan	aco,ac/llvm,radv,radeonsi: handle ps bc optimization in nir for radv	2023-04-26 03:27:26 +00:00
.clang-format	amd: Add radv_foreach_stage to ForEachMacros.	2023-03-27 08:29:35 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00