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39800f0fa3
This aligns the naming with PAL. Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
79 lines
3.2 KiB
C
79 lines
3.2 KiB
C
/*
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "ac_nir.h"
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#include "nir_builder.h"
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nir_ssa_def *
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ac_nir_load_arg(nir_builder *b, const struct ac_shader_args *ac_args, struct ac_arg arg)
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{
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unsigned num_components = ac_args->args[arg.arg_index].size;
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if (ac_args->args[arg.arg_index].file == AC_ARG_SGPR)
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return nir_load_scalar_arg_amd(b, num_components, .base = arg.arg_index);
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else
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return nir_load_vector_arg_amd(b, num_components, .base = arg.arg_index);
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}
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bool
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ac_nir_lower_indirect_derefs(nir_shader *shader,
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enum amd_gfx_level gfx_level)
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{
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bool progress = false;
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/* Lower large variables to scratch first so that we won't bloat the
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* shader by generating large if ladders for them. We later lower
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* scratch to alloca's, assuming LLVM won't generate VGPR indexing.
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*/
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NIR_PASS(progress, shader, nir_lower_vars_to_scratch, nir_var_function_temp, 256,
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glsl_get_natural_size_align_bytes);
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/* LLVM doesn't support VGPR indexing on GFX9. */
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bool llvm_has_working_vgpr_indexing = gfx_level != GFX9;
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/* TODO: Indirect indexing of GS inputs is unimplemented.
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*
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* TCS and TES load inputs directly from LDS or offchip memory, so
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* indirect indexing is trivial.
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*/
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nir_variable_mode indirect_mask = 0;
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if (shader->info.stage == MESA_SHADER_GEOMETRY ||
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(shader->info.stage != MESA_SHADER_TESS_CTRL && shader->info.stage != MESA_SHADER_TESS_EVAL &&
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!llvm_has_working_vgpr_indexing)) {
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indirect_mask |= nir_var_shader_in;
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}
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if (!llvm_has_working_vgpr_indexing && shader->info.stage != MESA_SHADER_TESS_CTRL)
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indirect_mask |= nir_var_shader_out;
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/* TODO: We shouldn't need to do this, however LLVM isn't currently
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* smart enough to handle indirects without causing excess spilling
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* causing the gpu to hang.
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*
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* See the following thread for more details of the problem:
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* https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
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*/
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indirect_mask |= nir_var_function_temp;
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progress |= nir_lower_indirect_derefs(shader, indirect_mask, UINT32_MAX);
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return progress;
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}
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